Commit a2fe7baa authored by Michael Tretter's avatar Michael Tretter Committed by Stephen Boyd
Browse files

clk: xilinx: move xlnx_vcu clock driver from soc



The xlnx_vcu driver is actually a clock controller driver which provides
clocks that can be used by a driver for the encoder/decoder units. There
is no reason to keep this driver in soc. Move the driver to clk.

NOTE: The register mapping actually contains registers for AXI
performance monitoring, but these are not used by the driver.

Signed-off-by: default avatarMichael Tretter <m.tretter@pengutronix.de>
Acked-by: default avatarMichal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-16-m.tretter@pengutronix.de


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent cd0cefa9
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@@ -393,6 +393,7 @@ source "drivers/clk/tegra/Kconfig"
source "drivers/clk/ti/Kconfig"
source "drivers/clk/uniphier/Kconfig"
source "drivers/clk/x86/Kconfig"
source "drivers/clk/xilinx/Kconfig"
source "drivers/clk/zynqmp/Kconfig"

endif
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@@ -122,6 +122,7 @@ obj-y += versatile/
ifeq ($(CONFIG_COMMON_CLK), y)
obj-$(CONFIG_X86)			+= x86/
endif
obj-y					+= xilinx/
obj-$(CONFIG_ARCH_ZX)			+= zte/
obj-$(CONFIG_ARCH_ZYNQ)			+= zynq/
obj-$(CONFIG_COMMON_CLK_ZYNQMP)         += zynqmp/
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# SPDX-License-Identifier: GPL-2.0

config XILINX_VCU
	tristate "Xilinx VCU logicoreIP Init"
	depends on HAS_IOMEM && COMMON_CLK
	select REGMAP_MMIO
	help
	  Provides the driver to enable and disable the isolation between the
	  processing system and programmable logic part by using the logicoreIP
	  register set. This driver also configures the frequency based on the
	  clock information from the logicoreIP register set.

	  If you say yes here you get support for the logicoreIP.

	  If unsure, say N.

	  To compile this driver as a module, choose M here: the
	  module will be called xlnx_vcu.
+2 −0
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# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_XILINX_VCU)	+= xlnx_vcu.o
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