Commit a2fa4ced authored by Yanteng Si's avatar Yanteng Si Committed by Thomas Bogendoerfer
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MIPS: mm: Add prototype for function __update_cache 



This commit adds a prototype to fix error at W=1:

arch/mips/mm/cache.c:129:6: error: no previous prototype
for '__update_cache' [-Werror=missing-prototypes]

Signed-off-by: default avatarYanteng Si <siyanteng@loongson.cn>
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent fceb90bb

arch/mips/include/asm/pgtable.h

+1 −1
Original line number Diff line number Diff line
@@ -64,6 +64,7 @@ struct vm_area_struct; 
#define __S111 __pgprot(0)



extern unsigned long _page_cachable_default;

extern void __update_cache(unsigned long address, pte_t pte);



/*

 * ZERO_PAGE is a global shared page that is always zero; used
@@ -224,7 +225,6 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *pt 
static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,

			      pte_t *ptep, pte_t pteval)

{

	extern void __update_cache(unsigned long address, pte_t pte);



	if (!pte_present(pteval))

		goto cache_sync_done;

arch/mips/mm/cache.c

+1 −0
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ 
#include <asm/cpu.h>

#include <asm/cpu-features.h>

#include <asm/setup.h>

#include <asm/pgtable.h>



/* Cache operations. */

void (*flush_cache_all)(void);