Commit a2b57943 authored by Taniya Das's avatar Taniya Das Committed by Stephen Boyd
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clk: qcom: clk-alpha-pll: Add support for controlling Agera PLLs 



Add programming sequence support for managing the Agera PLLs.

Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1602873815-1677-3-git-send-email-tdas@codeaurora.org


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 61a31292

drivers/clk/qcom/clk-alpha-pll.c

+62 −0
Original line number Diff line number Diff line
@@ -116,6 +116,16 @@ const u8 clk_alpha_pll_regs[][PLL_OFF_MAX_REGS] = { 
		[PLL_OFF_OPMODE] = 0x38,

		[PLL_OFF_ALPHA_VAL] = 0x40,

	},

	[CLK_ALPHA_PLL_TYPE_AGERA] =  {

		[PLL_OFF_L_VAL] = 0x04,

		[PLL_OFF_ALPHA_VAL] = 0x08,

		[PLL_OFF_USER_CTL] = 0x0c,

		[PLL_OFF_CONFIG_CTL] = 0x10,

		[PLL_OFF_CONFIG_CTL_U] = 0x14,

		[PLL_OFF_TEST_CTL] = 0x18,

		[PLL_OFF_TEST_CTL_U] = 0x1c,

		[PLL_OFF_STATUS] = 0x2c,

	},

};

EXPORT_SYMBOL_GPL(clk_alpha_pll_regs);
@@ -1538,3 +1548,55 @@ const struct clk_ops clk_alpha_pll_postdiv_lucid_ops = { 
	.set_rate = clk_alpha_pll_postdiv_fabia_set_rate,

};

EXPORT_SYMBOL_GPL(clk_alpha_pll_postdiv_lucid_ops);



void clk_agera_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,

			const struct alpha_pll_config *config)

{

	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);

	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);

	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),

							config->user_ctl_val);

	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),

						config->config_ctl_val);

	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),

						config->config_ctl_hi_val);

	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),

						config->test_ctl_val);

	clk_alpha_pll_write_config(regmap,  PLL_TEST_CTL_U(pll),

						config->test_ctl_hi_val);

}

EXPORT_SYMBOL_GPL(clk_agera_pll_configure);



static int clk_alpha_pll_agera_set_rate(struct clk_hw *hw, unsigned long rate,

							unsigned long prate)

{

	struct clk_alpha_pll *pll = to_clk_alpha_pll(hw);

	u32 l, alpha_width = pll_alpha_width(pll);

	int ret;

	unsigned long rrate;

	u64 a;



	rrate = alpha_pll_round_rate(rate, prate, &l, &a, alpha_width);

	ret = alpha_pll_check_rate_margin(hw, rrate, rate);

	if (ret < 0)

		return ret;



	/* change L_VAL without having to go through the power on sequence */

	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);

	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);



	if (clk_hw_is_enabled(hw))

		return wait_for_pll_enable_lock(pll);



	return 0;

}



const struct clk_ops clk_alpha_pll_agera_ops = {

	.enable = clk_alpha_pll_enable,

	.disable = clk_alpha_pll_disable,

	.is_enabled = clk_alpha_pll_is_enabled,

	.recalc_rate = alpha_pll_fabia_recalc_rate,

	.round_rate = clk_alpha_pll_round_rate,

	.set_rate = clk_alpha_pll_agera_set_rate,

};

EXPORT_SYMBOL_GPL(clk_alpha_pll_agera_ops);

drivers/clk/qcom/clk-alpha-pll.h

+4 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ enum { 
	CLK_ALPHA_PLL_TYPE_FABIA,

	CLK_ALPHA_PLL_TYPE_TRION,

	CLK_ALPHA_PLL_TYPE_LUCID = CLK_ALPHA_PLL_TYPE_TRION,

	CLK_ALPHA_PLL_TYPE_AGERA,

	CLK_ALPHA_PLL_TYPE_MAX,

};
@@ -141,6 +142,7 @@ extern const struct clk_ops clk_alpha_pll_postdiv_trion_ops; 
extern const struct clk_ops clk_alpha_pll_lucid_ops;

#define clk_alpha_pll_fixed_lucid_ops clk_alpha_pll_fixed_trion_ops

extern const struct clk_ops clk_alpha_pll_postdiv_lucid_ops;

extern const struct clk_ops clk_alpha_pll_agera_ops;



void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,

			     const struct alpha_pll_config *config);
@@ -148,6 +150,8 @@ void clk_fabia_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, 
				const struct alpha_pll_config *config);

void clk_trion_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,

			     const struct alpha_pll_config *config);

void clk_agera_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,

				const struct alpha_pll_config *config);

#define clk_lucid_pll_configure(pll, regmap, config) \

	clk_trion_pll_configure(pll, regmap, config)