Commit a271885a authored by Chanho Park's avatar Chanho Park Committed by Martin K. Petersen
Browse files

scsi: ufs: ufs-exynos: Add EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR option 

To skip exynos_ufs_config_phy_*_attr settings for exynos-ufs variant,
provide EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR as an opts flag.

For the ExynosAuto v9 SoC's controller, M-Phy timing setting is not
required and most of vendor-specific configuration will be performed in the
pre_link callback function.

Link: https://lore.kernel.org/r/20211018124216.153072-9-chanho61.park@samsung.com


Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Kiwoong Kim <kwmad.kim@samsung.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: default avatarChanho Park <chanho61.park@samsung.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 533b81d6

drivers/scsi/ufs/ufs-exynos.c

+4 −2
Original line number Diff line number Diff line
@@ -830,8 +830,10 @@ static int exynos_ufs_pre_link(struct ufs_hba *hba) 


	/* m-phy */

	exynos_ufs_phy_init(ufs);

	if (!(ufs->opts & EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR)) {

		exynos_ufs_config_phy_time_attr(ufs);

		exynos_ufs_config_phy_cap_attr(ufs);

	}



	exynos_ufs_setup_clocks(hba, true, PRE_CHANGE);

drivers/scsi/ufs/ufs-exynos.h

+1 −0
Original line number Diff line number Diff line
@@ -199,6 +199,7 @@ struct exynos_ufs { 
#define EXYNOS_UFS_OPT_BROKEN_AUTO_CLK_CTRL	BIT(2)

#define EXYNOS_UFS_OPT_BROKEN_RX_SEL_IDX	BIT(3)

#define EXYNOS_UFS_OPT_USE_SW_HIBERN8_TIMER	BIT(4)

#define EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR	BIT(5)

};



#define for_each_ufs_rx_lane(ufs, i) \