Commit a242f429 authored by Eric Anholt's avatar Eric Anholt Committed by Will Deacon
Browse files

iommu/arm-smmu-qcom: Skip the TTBR1 quirk for db820c. 



db820c wants to use the qcom smmu path to get HUPCF set (which keeps
the GPU from wedging and then sometimes wedging the kernel after a
page fault), but it doesn't have separate pagetables support yet in
drm/msm so we can't go all the way to the TTBR1 path.

Signed-off-by: default avatarEric Anholt <eric@anholt.net>
Reviewed-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210326231303.3071950-1-eric@anholt.net


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent 6321484d

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c

+12 −1
Original line number Original line Diff line number Diff line
@@ -131,6 +131,16 @@ static int qcom_adreno_smmu_alloc_context_bank(struct arm_smmu_domain *smmu_doma 
	return __arm_smmu_alloc_bitmap(smmu->context_map, start, count);

	return __arm_smmu_alloc_bitmap(smmu->context_map, start, count);

}

}





static bool qcom_adreno_can_do_ttbr1(struct arm_smmu_device *smmu)

{

	const struct device_node *np = smmu->dev->of_node;



	if (of_device_is_compatible(np, "qcom,msm8996-smmu-v2"))

		return false;



	return true;

}



static int qcom_adreno_smmu_init_context(struct arm_smmu_domain *smmu_domain,

static int qcom_adreno_smmu_init_context(struct arm_smmu_domain *smmu_domain,

		struct io_pgtable_cfg *pgtbl_cfg, struct device *dev)

		struct io_pgtable_cfg *pgtbl_cfg, struct device *dev)

{

{
@@ -145,7 +155,8 @@ static int qcom_adreno_smmu_init_context(struct arm_smmu_domain *smmu_domain, 
	 * be AARCH64 stage 1 but double check because the arm-smmu code assumes

	 * be AARCH64 stage 1 but double check because the arm-smmu code assumes

	 * that is the case when the TTBR1 quirk is enabled

	 * that is the case when the TTBR1 quirk is enabled

	 */

	 */

	if ((smmu_domain->stage == ARM_SMMU_DOMAIN_S1) &&

	if (qcom_adreno_can_do_ttbr1(smmu_domain->smmu) &&

	    (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) &&

	    (smmu_domain->cfg.fmt == ARM_SMMU_CTX_FMT_AARCH64))

	    (smmu_domain->cfg.fmt == ARM_SMMU_CTX_FMT_AARCH64))

		pgtbl_cfg->quirks |= IO_PGTABLE_QUIRK_ARM_TTBR1;

		pgtbl_cfg->quirks |= IO_PGTABLE_QUIRK_ARM_TTBR1;