Commit a1dcfbdf authored by Biju Das's avatar Biju Das Committed by Marc Kleine-Budde
Browse files

can: rcar_canfd: Add postdiv to struct rcar_canfd_hw_info 



R-Car has a clock divider for CAN FD clock within the IP, whereas
it is not available on RZ/G2L.

Add postdiv variable to struct rcar_canfd_hw_info to take care of this
difference.

Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/all/20221027082158.95895-5-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
parent 841645cf

drivers/net/can/rcar/rcar_canfd.c

+6 −2
Original line number Diff line number Diff line
@@ -525,6 +525,7 @@ struct rcar_canfd_global; 
struct rcar_canfd_hw_info {

	enum rcanfd_chip_id chip_id;

	u8 max_channels;

	u8 postdiv;

	/* hardware features */

	unsigned shared_global_irqs:1;	/* Has shared global irqs */

};
@@ -599,17 +600,20 @@ static const struct can_bittiming_const rcar_canfd_bittiming_const = { 
static const struct rcar_canfd_hw_info rcar_gen3_hw_info = {

	.chip_id = RENESAS_RCAR_GEN3,

	.max_channels = 2,

	.postdiv = 2,

	.shared_global_irqs = 1,

};



static const struct rcar_canfd_hw_info rzg2l_hw_info = {

	.chip_id = RENESAS_RZG2L,

	.postdiv = 1,

	.max_channels = 2,

};



static const struct rcar_canfd_hw_info r8a779a0_hw_info = {

	.chip_id = RENESAS_R8A779A0,

	.max_channels = 8,

	.postdiv = 2,

	.shared_global_irqs = 1,

};
@@ -1938,9 +1942,9 @@ static int rcar_canfd_probe(struct platform_device *pdev) 
	}

	fcan_freq = clk_get_rate(gpriv->can_clk);



	if (gpriv->fcan == RCANFD_CANFDCLK && info->chip_id != RENESAS_RZG2L)

	if (gpriv->fcan == RCANFD_CANFDCLK)

		/* CANFD clock is further divided by (1/2) within the IP */

		fcan_freq /= 2;

		fcan_freq /= info->postdiv;



	addr = devm_platform_ioremap_resource(pdev, 0);

	if (IS_ERR(addr)) {