Commit a1d4ef1a authored by Fabien Dessenne's avatar Fabien Dessenne Committed by Linus Walleij
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pinctrl: stm32: fix optional IRQ support to gpios



To act as an interrupt controller, a gpio bank relies on the
"interrupt-parent" of the pin controller.
When this optional "interrupt-parent" misses, do not create any IRQ domain.

This fixes a "NULL pointer in stm32_gpio_domain_alloc()" kernel crash when
the interrupt-parent = <exti> property is not declared in the Device Tree.

Fixes: 0eb9f683 ("pinctrl: Add IRQ support to STM32 gpios")
Signed-off-by: default avatarFabien Dessenne <fabien.dessenne@foss.st.com>
Link: https://lore.kernel.org/r/20220627142350.742973-1-fabien.dessenne@foss.st.com


Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent fbc24ebc
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+12 −8
Original line number Diff line number Diff line
@@ -1338,17 +1338,19 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, struct fwnode
	bank->secure_control = pctl->match_data->secure_control;
	spin_lock_init(&bank->lock);

	if (pctl->domain) {
		/* create irq hierarchical domain */
		bank->fwnode = fwnode;

	bank->domain = irq_domain_create_hierarchy(pctl->domain, 0,
					STM32_GPIO_IRQ_LINE, bank->fwnode,
					&stm32_gpio_domain_ops, bank);
		bank->domain = irq_domain_create_hierarchy(pctl->domain, 0, STM32_GPIO_IRQ_LINE,
							   bank->fwnode, &stm32_gpio_domain_ops,
							   bank);

		if (!bank->domain) {
			err = -ENODEV;
			goto err_clk;
		}
	}

	err = gpiochip_add_data(&bank->gpio_chip, bank);
	if (err) {
@@ -1510,6 +1512,8 @@ int stm32_pctl_probe(struct platform_device *pdev)
	pctl->domain = stm32_pctrl_get_irq_domain(pdev);
	if (IS_ERR(pctl->domain))
		return PTR_ERR(pctl->domain);
	if (!pctl->domain)
		dev_warn(dev, "pinctrl without interrupt support\n");

	/* hwspinlock is optional */
	hwlock_id = of_hwspin_lock_get_id(pdev->dev.of_node, 0);