Commit a1c414ee authored by Ander Conselvan de Oliveira's avatar Ander Conselvan de Oliveira
Browse files

drm/i915: Introduce intel_release_shared_dpll() 



While the details of getting a shared dpll are wrapped by
intel_get_shared_dpll(), the release was still hand rolled into the
modeset code. Fix that by creating an entry point for releasing the
pll and move that code there.

v2: Take old_dpll from crtc->state instead of crtc_state. (CI)
Signed-off-by: default avatarAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1483024933-3726-2-git-send-email-ander.conselvan.de.oliveira@intel.com
parent 4741da92

drivers/gpu/drm/i915/intel_display.c

+1 −5
Original line number Diff line number Diff line
@@ -13872,7 +13872,6 @@ static void intel_modeset_clear_plls(struct drm_atomic_state *state) 
{

	struct drm_device *dev = state->dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct intel_shared_dpll_config *shared_dpll = NULL;

	struct drm_crtc *crtc;

	struct drm_crtc_state *crtc_state;

	int i;
@@ -13893,10 +13892,7 @@ static void intel_modeset_clear_plls(struct drm_atomic_state *state) 
		if (!old_dpll)

			continue;



		if (!shared_dpll)

			shared_dpll = intel_atomic_get_shared_dpll_state(state);



		intel_shared_dpll_config_put(shared_dpll, old_dpll, intel_crtc);

		intel_release_shared_dpll(old_dpll, intel_crtc, state);

	}

}

drivers/gpu/drm/i915/intel_dpll_mgr.c

+18 −23
Original line number Diff line number Diff line
@@ -79,28 +79,6 @@ intel_get_shared_dpll_id(struct drm_i915_private *dev_priv, 
	return (enum intel_dpll_id) (pll - dev_priv->shared_dplls);

}



void

intel_shared_dpll_config_get(struct intel_shared_dpll_config *config,

			     struct intel_shared_dpll *pll,

			     struct intel_crtc *crtc)

{

	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);

	enum intel_dpll_id id = intel_get_shared_dpll_id(dev_priv, pll);



	config[id].crtc_mask |= 1 << crtc->pipe;

}



void

intel_shared_dpll_config_put(struct intel_shared_dpll_config *config,

			     struct intel_shared_dpll *pll,

			     struct intel_crtc *crtc)

{

	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);

	enum intel_dpll_id id = intel_get_shared_dpll_id(dev_priv, pll);



	config[id].crtc_mask &= ~(1 << crtc->pipe);

}



/* For ILK+ */

void assert_shared_dpll(struct drm_i915_private *dev_priv,

			struct intel_shared_dpll *pll,
@@ -284,7 +262,7 @@ intel_reference_shared_dpll(struct intel_shared_dpll *pll, 
	DRM_DEBUG_DRIVER("using %s for pipe %c\n", pll->name,

			 pipe_name(crtc->pipe));



	intel_shared_dpll_config_get(shared_dpll, pll, crtc);

	shared_dpll[pll->id].crtc_mask |= 1 << crtc->pipe;

}



void intel_shared_dpll_commit(struct drm_atomic_state *state)
@@ -1933,3 +1911,20 @@ intel_get_shared_dpll(struct intel_crtc *crtc, 


	return dpll_mgr->get_dpll(crtc, crtc_state, encoder);

}



/**

 * intel_release_shared_dpll - end use of DPLL by CRTC in atomic state

 * @dpll: dpll in use by @crtc

 * @crtc: crtc

 * @state: atomic state

 *

 */

void intel_release_shared_dpll(struct intel_shared_dpll *dpll,

			       struct intel_crtc *crtc,

			       struct drm_atomic_state *state)

{

	struct intel_shared_dpll_config *shared_dpll_config;



	shared_dpll_config = intel_atomic_get_shared_dpll_state(state);

	shared_dpll_config[dpll->id].crtc_mask &= ~(1 << crtc->pipe);

}

drivers/gpu/drm/i915/intel_dpll_mgr.h

+3 −8
Original line number Diff line number Diff line
@@ -138,14 +138,6 @@ intel_get_shared_dpll_by_id(struct drm_i915_private *dev_priv, 
enum intel_dpll_id

intel_get_shared_dpll_id(struct drm_i915_private *dev_priv,

			 struct intel_shared_dpll *pll);

void

intel_shared_dpll_config_get(struct intel_shared_dpll_config *config,

			     struct intel_shared_dpll *pll,

			     struct intel_crtc *crtc);

void

intel_shared_dpll_config_put(struct intel_shared_dpll_config *config,

			     struct intel_shared_dpll *pll,

			     struct intel_crtc *crtc);

void assert_shared_dpll(struct drm_i915_private *dev_priv,

			struct intel_shared_dpll *pll,

			bool state);
@@ -154,6 +146,9 @@ void assert_shared_dpll(struct drm_i915_private *dev_priv, 
struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc,

						struct intel_crtc_state *state,

						struct intel_encoder *encoder);

void intel_release_shared_dpll(struct intel_shared_dpll *dpll,

			       struct intel_crtc *crtc,

			       struct drm_atomic_state *state);

void intel_prepare_shared_dpll(struct intel_crtc *crtc);

void intel_enable_shared_dpll(struct intel_crtc *crtc);

void intel_disable_shared_dpll(struct intel_crtc *crtc);