Loading Documentation/devicetree/bindings/powerpc/fsl/fman.txt +40 −0 Original line number Diff line number Diff line Loading @@ -315,6 +315,16 @@ PROPERTIES Value type: <phandle> Definition: A phandle for 1EEE1588 timer. - pcsphy-handle Usage required for "fsl,fman-memac" MACs Value type: <phandle> Definition: A phandle for pcsphy. - tbi-handle Usage required for "fsl,fman-dtsec" MACs Value type: <phandle> Definition: A phandle for tbiphy. EXAMPLE fman1_tx28: port@a8000 { Loading @@ -340,6 +350,7 @@ ethernet@e0000 { reg = <0xe0000 0x1000>; fsl,fman-ports = <&fman1_rx8 &fman1_tx28>; ptp-timer = <&ptp-timer>; tbi-handle = <&tbi0>; }; ============================================================================ Loading Loading @@ -415,6 +426,13 @@ PROPERTIES The settings and programming routines for internal/external MDIO are different. Must be included for internal MDIO. For internal PHY device on internal mdio bus, a PHY node should be created. See the definition of the PHY node in booting-without-of.txt for an example of how to define a PHY (Internal PHY has no interrupt line). - For "fsl,fman-mdio" compatible internal mdio bus, the PHY is TBI PHY. - For "fsl,fman-memac-mdio" compatible internal mdio bus, the PHY is PCS PHY, PCS PHY addr must be '0'. EXAMPLE Example for FMan v2 external MDIO: Loading @@ -425,12 +443,29 @@ mdio@f1000 { interrupts = <101 2 0 0>; }; Example for FMan v2 internal MDIO: mdio@e3120 { compatible = "fsl,fman-mdio"; reg = <0xe3120 0xee0>; fsl,fman-internal-mdio; tbi1: tbi-phy@8 { reg = <0x8>; device_type = "tbi-phy"; }; }; Example for FMan v3 internal MDIO: mdio@f1000 { compatible = "fsl,fman-memac-mdio"; reg = <0xf1000 0x1000>; fsl,fman-internal-mdio; pcsphy6: ethernet-phy@0 { reg = <0x0>; }; }; ============================================================================= Loading Loading @@ -568,6 +603,7 @@ fman@400000 { cell-index = <0>; reg = <0xe0000 0x1000>; fsl,fman-ports = <&fman1_rx_0x8 &fman1_tx_0x28>; tbi-handle = <&tbi5>; }; ethernet@e2000 { Loading @@ -575,6 +611,7 @@ fman@400000 { cell-index = <1>; reg = <0xe2000 0x1000>; fsl,fman-ports = <&fman1_rx_0x9 &fman1_tx_0x29>; tbi-handle = <&tbi6>; }; ethernet@e4000 { Loading @@ -582,6 +619,7 @@ fman@400000 { cell-index = <2>; reg = <0xe4000 0x1000>; fsl,fman-ports = <&fman1_rx_0xa &fman1_tx_0x2a>; tbi-handle = <&tbi7>; }; ethernet@e6000 { Loading @@ -589,6 +627,7 @@ fman@400000 { cell-index = <3>; reg = <0xe6000 0x1000>; fsl,fman-ports = <&fman1_rx_0xb &fman1_tx_0x2b>; tbi-handle = <&tbi8>; }; ethernet@e8000 { Loading @@ -596,6 +635,7 @@ fman@400000 { cell-index = <4>; reg = <0xf0000 0x1000>; fsl,fman-ports = <&fman1_rx_0xc &fman1_tx_0x2c>; tbi-handle = <&tbi9>; ethernet@f0000 { cell-index = <8>; Loading Documentation/devicetree/bindings/soc/fsl/rcpm.txt 0 → 100644 +63 −0 Original line number Diff line number Diff line * Run Control and Power Management ------------------------------------------- The RCPM performs all device-level tasks associated with device run control and power management. Required properites: - reg : Offset and length of the register set of the RCPM block. - fsl,#rcpm-wakeup-cells : The number of IPPDEXPCR register cells in the fsl,rcpm-wakeup property. - compatible : Must contain a chip-specific RCPM block compatible string and (if applicable) may contain a chassis-version RCPM compatible string. Chip-specific strings are of the form "fsl,<chip>-rcpm", such as: * "fsl,p2041-rcpm" * "fsl,p5020-rcpm" * "fsl,t4240-rcpm" Chassis-version strings are of the form "fsl,qoriq-rcpm-<version>", such as: * "fsl,qoriq-rcpm-1.0": for chassis 1.0 rcpm * "fsl,qoriq-rcpm-2.0": for chassis 2.0 rcpm * "fsl,qoriq-rcpm-2.1": for chassis 2.1 rcpm All references to "1.0" and "2.0" refer to the QorIQ chassis version to which the chip complies. Chassis Version Example Chips --------------- ------------------------------- 1.0 p4080, p5020, p5040, p2041, p3041 2.0 t4240, b4860, b4420 2.1 t1040, ls1021 Example: The RCPM node for T4240: rcpm: global-utilities@e2000 { compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2.0"; reg = <0xe2000 0x1000>; fsl,#rcpm-wakeup-cells = <2>; }; * Freescale RCPM Wakeup Source Device Tree Bindings ------------------------------------------- Required fsl,rcpm-wakeup property should be added to a device node if the device can be used as a wakeup source. - fsl,rcpm-wakeup: Consists of a phandle to the rcpm node and the IPPDEXPCR register cells. The number of IPPDEXPCR register cells is defined in "fsl,#rcpm-wakeup-cells" in the rcpm node. The first register cell is the bit mask that should be set in IPPDEXPCR0, and the second register cell is for IPPDEXPCR1, and so on. Note: IPPDEXPCR(IP Powerdown Exception Control Register) provides a mechanism for keeping certain blocks awake during STANDBY and MEM, in order to use them as wake-up sources. Example: lpuart0: serial@2950000 { compatible = "fsl,ls1021a-lpuart"; reg = <0x0 0x2950000 0x0 0x1000>; interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; clocks = <&sysclk>; clock-names = "ipg"; fsl,rcpm-wakeup = <&rcpm 0x0 0x40000000>; }; Documentation/kernel-parameters.txt +1 −1 Original line number Diff line number Diff line Loading @@ -2582,7 +2582,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. nolapic_timer [X86-32,APIC] Do not use the local APIC timer. noltlbs [PPC] Do not use large page/tlb entries for kernel lowmem mapping on PPC40x. lowmem mapping on PPC40x and PPC8xx nomca [IA-64] Disable machine check abort handling Loading arch/powerpc/Kconfig +1 −1 Original line number Diff line number Diff line Loading @@ -408,7 +408,7 @@ config SWIOTLB config HOTPLUG_CPU bool "Support for enabling/disabling CPUs" depends on SMP && (PPC_PSERIES || \ PPC_PMAC || PPC_POWERNV || (PPC_85xx && !PPC_E500MC)) PPC_PMAC || PPC_POWERNV || FSL_SOC_BOOKE) ---help--- Say Y here to be able to disable and re-enable individual CPUs at runtime on SMP machines. Loading arch/powerpc/Makefile +10 −0 Original line number Diff line number Diff line Loading @@ -325,6 +325,16 @@ corenet64_smp_defconfig: $(call merge_into_defconfig,corenet_basic_defconfig,\ 85xx-64bit 85xx-smp altivec 85xx-hw fsl-emb-nonhw) PHONY += mpc86xx_defconfig mpc86xx_defconfig: $(call merge_into_defconfig,mpc86xx_basic_defconfig,\ 86xx-hw fsl-emb-nonhw) PHONY += mpc86xx_smp_defconfig mpc86xx_smp_defconfig: $(call merge_into_defconfig,mpc86xx_basic_defconfig,\ 86xx-smp 86xx-hw fsl-emb-nonhw) define archhelp @echo '* zImage - Build default images selected by kernel config' @echo ' zImage.* - Compressed kernel image (arch/$(ARCH)/boot/zImage.*)' Loading Loading
Documentation/devicetree/bindings/powerpc/fsl/fman.txt +40 −0 Original line number Diff line number Diff line Loading @@ -315,6 +315,16 @@ PROPERTIES Value type: <phandle> Definition: A phandle for 1EEE1588 timer. - pcsphy-handle Usage required for "fsl,fman-memac" MACs Value type: <phandle> Definition: A phandle for pcsphy. - tbi-handle Usage required for "fsl,fman-dtsec" MACs Value type: <phandle> Definition: A phandle for tbiphy. EXAMPLE fman1_tx28: port@a8000 { Loading @@ -340,6 +350,7 @@ ethernet@e0000 { reg = <0xe0000 0x1000>; fsl,fman-ports = <&fman1_rx8 &fman1_tx28>; ptp-timer = <&ptp-timer>; tbi-handle = <&tbi0>; }; ============================================================================ Loading Loading @@ -415,6 +426,13 @@ PROPERTIES The settings and programming routines for internal/external MDIO are different. Must be included for internal MDIO. For internal PHY device on internal mdio bus, a PHY node should be created. See the definition of the PHY node in booting-without-of.txt for an example of how to define a PHY (Internal PHY has no interrupt line). - For "fsl,fman-mdio" compatible internal mdio bus, the PHY is TBI PHY. - For "fsl,fman-memac-mdio" compatible internal mdio bus, the PHY is PCS PHY, PCS PHY addr must be '0'. EXAMPLE Example for FMan v2 external MDIO: Loading @@ -425,12 +443,29 @@ mdio@f1000 { interrupts = <101 2 0 0>; }; Example for FMan v2 internal MDIO: mdio@e3120 { compatible = "fsl,fman-mdio"; reg = <0xe3120 0xee0>; fsl,fman-internal-mdio; tbi1: tbi-phy@8 { reg = <0x8>; device_type = "tbi-phy"; }; }; Example for FMan v3 internal MDIO: mdio@f1000 { compatible = "fsl,fman-memac-mdio"; reg = <0xf1000 0x1000>; fsl,fman-internal-mdio; pcsphy6: ethernet-phy@0 { reg = <0x0>; }; }; ============================================================================= Loading Loading @@ -568,6 +603,7 @@ fman@400000 { cell-index = <0>; reg = <0xe0000 0x1000>; fsl,fman-ports = <&fman1_rx_0x8 &fman1_tx_0x28>; tbi-handle = <&tbi5>; }; ethernet@e2000 { Loading @@ -575,6 +611,7 @@ fman@400000 { cell-index = <1>; reg = <0xe2000 0x1000>; fsl,fman-ports = <&fman1_rx_0x9 &fman1_tx_0x29>; tbi-handle = <&tbi6>; }; ethernet@e4000 { Loading @@ -582,6 +619,7 @@ fman@400000 { cell-index = <2>; reg = <0xe4000 0x1000>; fsl,fman-ports = <&fman1_rx_0xa &fman1_tx_0x2a>; tbi-handle = <&tbi7>; }; ethernet@e6000 { Loading @@ -589,6 +627,7 @@ fman@400000 { cell-index = <3>; reg = <0xe6000 0x1000>; fsl,fman-ports = <&fman1_rx_0xb &fman1_tx_0x2b>; tbi-handle = <&tbi8>; }; ethernet@e8000 { Loading @@ -596,6 +635,7 @@ fman@400000 { cell-index = <4>; reg = <0xf0000 0x1000>; fsl,fman-ports = <&fman1_rx_0xc &fman1_tx_0x2c>; tbi-handle = <&tbi9>; ethernet@f0000 { cell-index = <8>; Loading
Documentation/devicetree/bindings/soc/fsl/rcpm.txt 0 → 100644 +63 −0 Original line number Diff line number Diff line * Run Control and Power Management ------------------------------------------- The RCPM performs all device-level tasks associated with device run control and power management. Required properites: - reg : Offset and length of the register set of the RCPM block. - fsl,#rcpm-wakeup-cells : The number of IPPDEXPCR register cells in the fsl,rcpm-wakeup property. - compatible : Must contain a chip-specific RCPM block compatible string and (if applicable) may contain a chassis-version RCPM compatible string. Chip-specific strings are of the form "fsl,<chip>-rcpm", such as: * "fsl,p2041-rcpm" * "fsl,p5020-rcpm" * "fsl,t4240-rcpm" Chassis-version strings are of the form "fsl,qoriq-rcpm-<version>", such as: * "fsl,qoriq-rcpm-1.0": for chassis 1.0 rcpm * "fsl,qoriq-rcpm-2.0": for chassis 2.0 rcpm * "fsl,qoriq-rcpm-2.1": for chassis 2.1 rcpm All references to "1.0" and "2.0" refer to the QorIQ chassis version to which the chip complies. Chassis Version Example Chips --------------- ------------------------------- 1.0 p4080, p5020, p5040, p2041, p3041 2.0 t4240, b4860, b4420 2.1 t1040, ls1021 Example: The RCPM node for T4240: rcpm: global-utilities@e2000 { compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2.0"; reg = <0xe2000 0x1000>; fsl,#rcpm-wakeup-cells = <2>; }; * Freescale RCPM Wakeup Source Device Tree Bindings ------------------------------------------- Required fsl,rcpm-wakeup property should be added to a device node if the device can be used as a wakeup source. - fsl,rcpm-wakeup: Consists of a phandle to the rcpm node and the IPPDEXPCR register cells. The number of IPPDEXPCR register cells is defined in "fsl,#rcpm-wakeup-cells" in the rcpm node. The first register cell is the bit mask that should be set in IPPDEXPCR0, and the second register cell is for IPPDEXPCR1, and so on. Note: IPPDEXPCR(IP Powerdown Exception Control Register) provides a mechanism for keeping certain blocks awake during STANDBY and MEM, in order to use them as wake-up sources. Example: lpuart0: serial@2950000 { compatible = "fsl,ls1021a-lpuart"; reg = <0x0 0x2950000 0x0 0x1000>; interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; clocks = <&sysclk>; clock-names = "ipg"; fsl,rcpm-wakeup = <&rcpm 0x0 0x40000000>; };
Documentation/kernel-parameters.txt +1 −1 Original line number Diff line number Diff line Loading @@ -2582,7 +2582,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. nolapic_timer [X86-32,APIC] Do not use the local APIC timer. noltlbs [PPC] Do not use large page/tlb entries for kernel lowmem mapping on PPC40x. lowmem mapping on PPC40x and PPC8xx nomca [IA-64] Disable machine check abort handling Loading
arch/powerpc/Kconfig +1 −1 Original line number Diff line number Diff line Loading @@ -408,7 +408,7 @@ config SWIOTLB config HOTPLUG_CPU bool "Support for enabling/disabling CPUs" depends on SMP && (PPC_PSERIES || \ PPC_PMAC || PPC_POWERNV || (PPC_85xx && !PPC_E500MC)) PPC_PMAC || PPC_POWERNV || FSL_SOC_BOOKE) ---help--- Say Y here to be able to disable and re-enable individual CPUs at runtime on SMP machines. Loading
arch/powerpc/Makefile +10 −0 Original line number Diff line number Diff line Loading @@ -325,6 +325,16 @@ corenet64_smp_defconfig: $(call merge_into_defconfig,corenet_basic_defconfig,\ 85xx-64bit 85xx-smp altivec 85xx-hw fsl-emb-nonhw) PHONY += mpc86xx_defconfig mpc86xx_defconfig: $(call merge_into_defconfig,mpc86xx_basic_defconfig,\ 86xx-hw fsl-emb-nonhw) PHONY += mpc86xx_smp_defconfig mpc86xx_smp_defconfig: $(call merge_into_defconfig,mpc86xx_basic_defconfig,\ 86xx-smp 86xx-hw fsl-emb-nonhw) define archhelp @echo '* zImage - Build default images selected by kernel config' @echo ' zImage.* - Compressed kernel image (arch/$(ARCH)/boot/zImage.*)' Loading