Unverified Commit a1b1e988 authored by Akshu Agrawal's avatar Akshu Agrawal Committed by Mark Brown
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ASoC: AMD: Change MCLK to 48Mhz 



25Mhz MCLK which was earlier used was of spread type.
Thus, we were not getting accurate rate. The 48Mhz system
clk is of non-spread type and we are changing to it to get
accurate rate.

Signed-off-by: default avatarAkshu Agrawal <akshu.agrawal@amd.com>
Reviewed-by: default avatarDaniel Kurtz <djkurtz@chromium.org>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent c736cbd3

sound/soc/amd/acp-da7219-max98357a.c

+1 −1
Original line number Diff line number Diff line
@@ -42,7 +42,7 @@ 
#include "../codecs/da7219.h"

#include "../codecs/da7219-aad.h"



#define CZ_PLAT_CLK 25000000

#define CZ_PLAT_CLK 48000000

#define DUAL_CHANNEL		2



static struct snd_soc_jack cz_jack;