Commit a16e5b24 authored by Ben Hutchings's avatar Ben Hutchings
Browse files

sfc: Make all CPU/IRQ/channel/queue counts unsigned 



Signed-off-by: default avatarBen Hutchings <bhutchings@solarflare.com>
parent 5bbe2f4f

drivers/net/ethernet/sfc/efx.c

+10 −8
Original line number Diff line number Diff line
@@ -1104,10 +1104,10 @@ static void efx_fini_io(struct efx_nic *efx) 
	pci_disable_device(efx->pci_dev);

}



static int efx_wanted_parallelism(void)

static unsigned int efx_wanted_parallelism(void)

{

	cpumask_var_t thread_mask;

	int count;

	unsigned int count;

	int cpu;



	if (rss_cpus)
@@ -1136,7 +1136,8 @@ static int 
efx_init_rx_cpu_rmap(struct efx_nic *efx, struct msix_entry *xentries)

{

#ifdef CONFIG_RFS_ACCEL

	int i, rc;

	unsigned int i;

	int rc;



	efx->net_dev->rx_cpu_rmap = alloc_irq_cpu_rmap(efx->n_rx_channels);

	if (!efx->net_dev->rx_cpu_rmap)
@@ -1159,13 +1160,14 @@ efx_init_rx_cpu_rmap(struct efx_nic *efx, struct msix_entry *xentries) 
 */

static int efx_probe_interrupts(struct efx_nic *efx)

{

	int max_channels =

		min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);

	int rc, i;

	unsigned int max_channels =

		min(efx->type->phys_addr_channels, EFX_MAX_CHANNELS);

	unsigned int i;

	int rc;



	if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {

		struct msix_entry xentries[EFX_MAX_CHANNELS];

		int n_channels;

		unsigned int n_channels;



		n_channels = efx_wanted_parallelism();

		if (separate_tx_channels)
@@ -1178,7 +1180,7 @@ static int efx_probe_interrupts(struct efx_nic *efx) 
		if (rc > 0) {

			netif_err(efx, drv, efx->net_dev,

				  "WARNING: Insufficient MSI-X vectors"

				  " available (%d < %d).\n", rc, n_channels);

				  " available (%d < %u).\n", rc, n_channels);

			netif_err(efx, drv, efx->net_dev,

				  "WARNING: Performance may be reduced.\n");

			EFX_BUG_ON_PARANOID(rc >= n_channels);

drivers/net/ethernet/sfc/net_driver.h

+1 −1
Original line number Diff line number Diff line
@@ -52,7 +52,7 @@ 
 *

 **************************************************************************/



#define EFX_MAX_CHANNELS 32

#define EFX_MAX_CHANNELS 32U

#define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS



/* Checksum generation is a per-queue option in hardware, so each