Commit a16161a8 authored by Yifan Zhang's avatar Yifan Zhang Committed by Alex Deucher
Browse files

drm/amdgpu: correct RLC_RLCS_BOOTLOAD_STATUS offset and index



This patch corrects RLC_RLCS_BOOTLOAD_STATUS offset and index for
GC 11.0.1.

Signed-off-by: default avatarYifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: default avatarTim Huang <Tim.Huang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b834fc94
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+9 −1
Original line number Diff line number Diff line
@@ -56,6 +56,8 @@

#define regCGTT_WD_CLK_CTRL		0x5086
#define regCGTT_WD_CLK_CTRL_BASE_IDX	1
#define regRLC_RLCS_BOOTLOAD_STATUS_gc_11_0_1	0x4e7e
#define regRLC_RLCS_BOOTLOAD_STATUS_gc_11_0_1_BASE_IDX	1

MODULE_FIRMWARE("amdgpu/gc_11_0_0_pfp.bin");
MODULE_FIRMWARE("amdgpu/gc_11_0_0_me.bin");
@@ -2765,7 +2767,13 @@ static int gfx_v11_0_wait_for_rlc_autoload_complete(struct amdgpu_device *adev)

	for (i = 0; i < adev->usec_timeout; i++) {
		cp_status = RREG32_SOC15(GC, 0, regCP_STAT);

		if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(11, 0, 1))
			bootload_status = RREG32_SOC15(GC, 0,
					regRLC_RLCS_BOOTLOAD_STATUS_gc_11_0_1);
		else
			bootload_status = RREG32_SOC15(GC, 0, regRLC_RLCS_BOOTLOAD_STATUS);

		if ((cp_status == 0) &&
		    (REG_GET_FIELD(bootload_status,
			RLC_RLCS_BOOTLOAD_STATUS, BOOTLOAD_COMPLETE) == 1)) {