Commit a1043fbc authored by Markus Schneider-Pargmann's avatar Markus Schneider-Pargmann Committed by Stephen Boyd
Browse files

clk: mediatek: mt8365: Fix inverted topclk operations 



The given operations are inverted for the wrong registers which makes
multiple of the mt8365 hardware units unusable. In my setup at least usb
did not work.

Fixed by swapping the operations with the inverted ones.

Reported-by: default avatarAlexandre Mergnat <amergnat@baylibre.com>
Fixes: 905b7430 ("clk: mediatek: mt8365: Convert simple_gate to mtk_gate clocks")
Signed-off-by: default avatarMarkus Schneider-Pargmann <msp@baylibre.com>
Link: https://lore.kernel.org/r/20230511133226.913600-1-msp@baylibre.com


Tested-by: default avatarAlexandre Mergnat <amergnat@baylibre.com>
Reviewed-by: default avatarAlexandre Mergnat <amergnat@baylibre.com>
Reviewed-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent d54fb4b2

drivers/clk/mediatek/clk-mt8365.c

+3 −3
Original line number Diff line number Diff line
@@ -592,15 +592,15 @@ static const struct mtk_gate_regs top2_cg_regs = { 


#define GATE_TOP0(_id, _name, _parent, _shift)			\

	GATE_MTK(_id, _name, _parent, &top0_cg_regs,		\

		 _shift, &mtk_clk_gate_ops_no_setclr_inv)

		 _shift, &mtk_clk_gate_ops_no_setclr)



#define GATE_TOP1(_id, _name, _parent, _shift)			\

	GATE_MTK(_id, _name, _parent, &top1_cg_regs,		\

		 _shift, &mtk_clk_gate_ops_no_setclr)

		 _shift, &mtk_clk_gate_ops_no_setclr_inv)



#define GATE_TOP2(_id, _name, _parent, _shift)			\

	GATE_MTK(_id, _name, _parent, &top2_cg_regs,		\

		 _shift, &mtk_clk_gate_ops_no_setclr)

		 _shift, &mtk_clk_gate_ops_no_setclr_inv)



static const struct mtk_gate top_clk_gates[] = {

	GATE_TOP0(CLK_TOP_CONN_32K, "conn_32k", "clk32k", 10),