Unverified Commit a0dcd1ff authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Mark Brown
Browse files

spi: renesas,sh-msiof: Miscellaneous improvements 



Make "clocks" and "power-domains" required everywhere.
Make "resets" required on R-Car Gen2 and newer (i.e. all but SH-Mobile).

Update the example to match reality:
  - Use interrupt binding definitions instead of hardcoded numbers,
  - Convert to new-style CPG/MSSR bindings,
  - Add missing "power-domains" and "resets" properties.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/052af97ecbaa9ba6e0d406883dd3389fa397579a.1678891999.git.geert+renesas@glider.be


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 864f0513

Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml

+19 −4
Original line number Diff line number Diff line
@@ -149,23 +149,38 @@ required: 
  - compatible

  - reg

  - interrupts

  - clocks

  - power-domains

  - '#address-cells'

  - '#size-cells'



if:

  not:

    properties:

      compatible:

        contains:

          const: renesas,sh-mobile-msiof

then:

  required:

    - resets



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/clock/r8a7791-clock.h>

    #include <dt-bindings/interrupt-controller/irq.h>

    #include <dt-bindings/clock/r8a7791-cpg-mssr.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/power/r8a7791-sysc.h>



    msiof0: spi@e6e20000 {

        compatible = "renesas,msiof-r8a7791", "renesas,rcar-gen2-msiof";

        reg = <0xe6e20000 0x0064>;

        interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;

        clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;

        interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;

        clocks = <&cpg CPG_MOD 000>;

        dmas = <&dmac0 0x51>, <&dmac0 0x52>;

        dma-names = "tx", "rx";

        power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;

        resets = <&cpg 0>;

        #address-cells = <1>;

        #size-cells = <0>;

    };