Commit a0d54553 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski
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arm64: dts: exynos: adjust USB DRD clocks with dtschema in Exynos7 



Use the same order of USB 3.0 DRD controller clocks as in Exynos5433.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220129193646.372481-1-krzysztof.kozlowski@canonical.com
parent ff72497f

arch/arm64/boot/dts/exynos/exynos7.dtsi

+2 −3
Original line number Diff line number Diff line
@@ -684,11 +684,10 @@ 
			reg = <0x15500000 0x100>;

			clocks = <&clock_fsys0 ACLK_USBDRD300>,

			       <&clock_fsys0 OSCCLK_PHY_CLKOUT_USB30_PHY>,

			       <&clock_fsys0 PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER>,

			       <&clock_fsys0 PHYCLK_USBDRD300_UDRD30_PHYCLK_USER>,

			       <&clock_fsys0 PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER>,

			       <&clock_fsys0 SCLK_USBDRD300_REFCLK>;

			clock-names = "phy", "ref", "phy_pipe",

				"phy_utmi", "itp";

			clock-names = "phy", "ref", "phy_utmi", "phy_pipe", "itp";

			samsung,pmu-syscon = <&pmu_system_controller>;

			#phy-cells = <1>;

		};