Commit a0d3fdb6 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915/gt: Split logical ring contexts from execlist submission 



Split the definition, construction and updating of the Logical Ring
Context from the execlist submission interface. The LRC is used by the
HW, irrespective of our different submission backends.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201219020343.22681-1-chris@chris-wilson.co.uk
parent 5ec17c76

drivers/gpu/drm/i915/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -104,6 +104,7 @@ gt-y += \ 
	gt/intel_gt_requests.o \

	gt/intel_gtt.o \

	gt/intel_llc.o \

	gt/intel_lrc.o \

	gt/intel_mocs.o \

	gt/intel_ppgtt.o \

	gt/intel_rc6.o \

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

+1 −1
Original line number Diff line number Diff line
@@ -5,7 +5,7 @@ 


#include "gen8_engine_cs.h"

#include "i915_drv.h"

#include "intel_execlists_submission.h" /* XXX */

#include "intel_lrc.h"

#include "intel_gpu_commands.h"

#include "intel_ring.h"

drivers/gpu/drm/i915/gt/intel_context_sseu.c

+1 −2
Original line number Diff line number Diff line
@@ -8,8 +8,7 @@ 
#include "intel_context.h"

#include "intel_engine_pm.h"

#include "intel_gpu_commands.h"

#include "intel_execlists_submission.h"

#include "intel_lrc_reg.h"

#include "intel_lrc.h"

#include "intel_ring.h"

#include "intel_sseu.h"

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

+60 −1623

File changed.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/i915/gt/intel_execlists_submission.h

+0 −17
Original line number Diff line number Diff line
@@ -22,25 +22,8 @@ enum { 


int intel_execlists_submission_setup(struct intel_engine_cs *engine);



/* Logical Ring Contexts */

/* At the start of the context image is its per-process HWS page */

#define LRC_PPHWSP_PN	(0)

#define LRC_PPHWSP_SZ	(1)

/* After the PPHWSP we have the logical state for the context */

#define LRC_STATE_PN	(LRC_PPHWSP_PN + LRC_PPHWSP_SZ)

#define LRC_STATE_OFFSET (LRC_STATE_PN * PAGE_SIZE)



/* Space within PPHWSP reserved to be used as scratch */

#define LRC_PPHWSP_SCRATCH		0x34

#define LRC_PPHWSP_SCRATCH_ADDR		(LRC_PPHWSP_SCRATCH * sizeof(u32))



void intel_execlists_set_default_submission(struct intel_engine_cs *engine);



void intel_lr_context_reset(struct intel_engine_cs *engine,

			    struct intel_context *ce,

			    u32 head,

			    bool scrub);



void intel_execlists_show_requests(struct intel_engine_cs *engine,

				   struct drm_printer *m,

				   void (*show_request)(struct drm_printer *m,