Commit a04b1bf5 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'for-5.18/parisc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux 

Pull parisc architecture updates from Helge Deller:

 - add vDSO support (allows us to use non-executable stacks)

 - many TLB and cache flush optimizations (by Dave Anglin)

 - fix handling of probe non-access faults (by Dave Anglin)

 - fix invalidate/flush vmap routines (by Dave Anglin)

 - avoid using hardware single-step in kprobes

 - enable ARCH_HAS_DEBUG_VM_PGTABLE

 - many cleanups in unaligned handlers, e.g. rewrite of existing
   assembly code

 - always use the self-extracting kernel feature

 - big refacturing and code reductions regarding space-register usage in
   get_user() and put_user()

 - add fillrect() support to stifb graphics driver

* tag 'for-5.18/parisc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: (23 commits)
  parisc: Fix invalidate/flush vmap routines
  parisc: Avoid flushing cache on cache-less machines
  parisc: Avoid using hardware single-step in kprobes
  parisc: Improve CPU socket and core bootup info text
  parisc: Enable ARCH_HAS_DEBUG_VM_PGTABLE
  parisc: Avoid calling SMP cache flush functions on cache-less machines
  parisc: Increase parisc_cache_flush_threshold setting
  parisc/unaligned: Enhance user-space visible output
  parisc/unaligned: Rewrite 32-bit inline assembly of emulate_sth()
  parisc/unaligned: Rewrite 32-bit inline assembly of emulate_ldd()
  parisc/unaligned: Rewrite inline assembly of emulate_ldw()
  parisc/unaligned: Rewrite inline assembly of emulate_ldh()
  parisc/unaligned: Use EFAULT fixup handler in unaligned handlers
  parisc: Reduce code size by optimizing get_current() function calls
  parisc: Use constants to encode the space registers like SR_KERNEL
  parisc: Use SR_USER and SR_KERNEL in get_user() and put_user()
  parisc: Add defines for various space register
  parisc: Always use the self-extracting kernel feature
  video/fbdev/stifb: Implement the stifb_fillrect() function
  parisc: Add vDSO support
  ...
parents 93287e28 53d862fa

arch/parisc/Kconfig

+2 −12
Original line number Diff line number Diff line
@@ -10,10 +10,12 @@ config PARISC 
	select ARCH_HAS_ELF_RANDOMIZE

	select ARCH_HAS_STRICT_KERNEL_RWX

	select ARCH_HAS_UBSAN_SANITIZE_ALL

	select ARCH_HAS_PTE_SPECIAL

	select ARCH_NO_SG_CHAIN

	select ARCH_SUPPORTS_HUGETLBFS if PA20

	select ARCH_SUPPORTS_MEMORY_FAILURE

	select ARCH_STACKWALK

	select ARCH_HAS_DEBUG_VM_PGTABLE

	select HAVE_RELIABLE_STACKTRACE

	select DMA_OPS

	select RTC_CLASS
@@ -259,18 +261,6 @@ config PARISC_PAGE_SIZE_64KB 


endchoice



config PARISC_SELF_EXTRACT

	bool "Build kernel as self-extracting executable"

	default y

	help

	  Say Y if you want to build the parisc kernel as a kind of

	  self-extracting executable.



	  If you say N here, the kernel will be compressed with gzip

	  which can be loaded by the palo bootloader directly too.



	  If you don't know what to do here, say Y.



config SMP

	bool "Symmetric multi-processing support"

	help

arch/parisc/Makefile

+29 −8
Original line number Diff line number Diff line
@@ -15,12 +15,8 @@ 
# Mike Shaver, Helge Deller and Martin K. Petersen

#



ifdef CONFIG_PARISC_SELF_EXTRACT

boot := arch/parisc/boot

KBUILD_IMAGE := $(boot)/bzImage

else

KBUILD_IMAGE := vmlinuz

endif



NM		= sh $(srctree)/arch/parisc/nm

CHECKFLAGS	+= -D__hppa__=1
@@ -44,6 +40,16 @@ endif 


export LD_BFD



# Set default 32 bits cross compilers for vdso

CC_ARCHES_32 = hppa hppa2.0 hppa1.1

CC_SUFFIXES  = linux linux-gnu unknown-linux-gnu

CROSS32_COMPILE := $(call cc-cross-prefix, \

	$(foreach a,$(CC_ARCHES_32), \

	$(foreach s,$(CC_SUFFIXES),$(a)-$(s)-)))

CROSS32CC := $(CROSS32_COMPILE)gcc

export CROSS32CC



# Set default cross compiler for kernel build

ifdef cross_compiling

	ifeq ($(CROSS_COMPILE),)

		CC_SUFFIXES = linux linux-gnu unknown-linux-gnu
@@ -155,14 +161,29 @@ Image: vmlinux 
bzImage: vmlinux

	$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@



ifdef CONFIG_PARISC_SELF_EXTRACT

vmlinuz: bzImage

	$(OBJCOPY) $(boot)/bzImage $@

else

vmlinuz: vmlinux

	@$(KGZIP) -cf -9 $< > $@



ifeq ($(KBUILD_EXTMOD),)

# We need to generate vdso-offsets.h before compiling certain files in kernel/.

# In order to do that, we should use the archprepare target, but we can't since

# asm-offsets.h is included in some files used to generate vdso-offsets.h, and

# asm-offsets.h is built in prepare0, for which archprepare is a dependency.

# Therefore we need to generate the header after prepare0 has been made, hence

# this hack.

prepare: vdso_prepare

vdso_prepare: prepare0

	$(if $(CONFIG_64BIT),$(Q)$(MAKE) \

		$(build)=arch/parisc/kernel/vdso64 include/generated/vdso64-offsets.h)

	$(Q)$(MAKE) $(build)=arch/parisc/kernel/vdso32 include/generated/vdso32-offsets.h

endif



PHONY += vdso_install



vdso_install:

	$(Q)$(MAKE) $(build)=arch/parisc/kernel/vdso $@

	$(if $(CONFIG_COMPAT_VDSO), \

		$(Q)$(MAKE) $(build)=arch/parisc/kernel/vdso32 $@)

install:

	$(CONFIG_SHELL) $(srctree)/arch/parisc/install.sh \

			$(KERNELRELEASE) vmlinux System.map "$(INSTALL_PATH)"

arch/parisc/include/asm/assembly.h

+6 −0
Original line number Diff line number Diff line
@@ -47,6 +47,12 @@ 
#define PRIV_USER	3

#define PRIV_KERNEL	0



/* Space register used inside kernel */

#define SR_KERNEL	0

#define SR_TEMP1	1

#define SR_TEMP2	2

#define SR_USER		3



#ifdef __ASSEMBLY__



#ifdef CONFIG_64BIT

arch/parisc/include/asm/cache.h

+4 −7
Original line number Diff line number Diff line
@@ -39,16 +39,13 @@ extern int icache_stride; 
extern struct pdc_cache_info cache_info;

void parisc_setup_cache_timing(void);



#define pdtlb(addr)	asm volatile("pdtlb 0(%%sr1,%0)" \

#define pdtlb(sr, addr)	asm volatile("pdtlb 0(%%sr%0,%1)" \

			ALTERNATIVE(ALT_COND_NO_SMP, INSN_PxTLB) \

			: : "r" (addr) : "memory")

#define pitlb(addr)	asm volatile("pitlb 0(%%sr1,%0)" \

			: : "i"(sr), "r" (addr) : "memory")

#define pitlb(sr, addr)	asm volatile("pitlb 0(%%sr%0,%1)" \

			ALTERNATIVE(ALT_COND_NO_SMP, INSN_PxTLB) \

			ALTERNATIVE(ALT_COND_NO_SPLIT_TLB, INSN_NOP) \

			: : "r" (addr) : "memory")

#define pdtlb_kernel(addr)  asm volatile("pdtlb 0(%0)"   \

			ALTERNATIVE(ALT_COND_NO_SMP, INSN_PxTLB) \

			: : "r" (addr) : "memory")

			: : "i"(sr), "r" (addr) : "memory")



#define asm_io_fdc(addr) asm volatile("fdc %%r0(%0)" \

			ALTERNATIVE(ALT_COND_NO_DCACHE, INSN_NOP) \

arch/parisc/include/asm/cacheflush.h

+5 −10
Original line number Diff line number Diff line
@@ -9,16 +9,11 @@ 
/* The usual comment is "Caches aren't brain-dead on the <architecture>".

 * Unfortunately, that doesn't apply to PA-RISC. */



/* Internal implementation */

void flush_data_cache_local(void *);  /* flushes local data-cache only */

void flush_instruction_cache_local(void *); /* flushes local code-cache only */

#ifdef CONFIG_SMP

void flush_data_cache(void); /* flushes data-cache only (all processors) */

void flush_instruction_cache(void); /* flushes i-cache only (all processors) */

#else

#define flush_data_cache() flush_data_cache_local(NULL)

#define flush_instruction_cache() flush_instruction_cache_local(NULL)

#endif

#include <linux/jump_label.h>



DECLARE_STATIC_KEY_TRUE(parisc_has_cache);

DECLARE_STATIC_KEY_TRUE(parisc_has_dcache);

DECLARE_STATIC_KEY_TRUE(parisc_has_icache);



#define flush_cache_dup_mm(mm) flush_cache_mm(mm)