Commit a044e6a0 authored by Yong Wu's avatar Yong Wu Committed by Matthias Brugger
Browse files

arm: dts: mediatek: Get rid of mediatek, larb for MM nodes 



After adding device_link between the IOMMU consumer and smi, the
mediatek,larb is unnecessary now.

CC: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: default avatarYong Wu <yong.wu@mediatek.com>
Signed-off-by: default avatarAllen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: default avatarEvan Green <evgreen@chromium.org>
Tested-by: Frank Wunderlich <frank-w@public-files.de> # BPI-R2/MT7623
Link: https://lore.kernel.org/r/20220421035111.7267-2-allen-kh.cheng@mediatek.com


Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 31231092

arch/arm/boot/dts/mt2701.dtsi

+0 −2
Original line number Diff line number Diff line
@@ -564,7 +564,6 @@ 
		clock-names = "jpgdec-smi",

			      "jpgdec";

		power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;

		mediatek,larb = <&larb2>;

		iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,

			 <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;

	};
@@ -577,7 +576,6 @@ 
		clocks =  <&imgsys CLK_IMG_VENC>;

		clock-names = "jpgenc";

		power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;

		mediatek,larb = <&larb2>;

		iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>,

			 <&iommu MT2701_M4U_PORT_JPGENC_BSDMA>;

	};

arch/arm/boot/dts/mt7623n.dtsi

+0 −5
Original line number Diff line number Diff line
@@ -121,7 +121,6 @@ 
		clock-names = "jpgdec-smi",

			      "jpgdec";

		power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;

		mediatek,larb = <&larb2>;

		iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,

			 <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;

	};
@@ -144,7 +143,6 @@ 
		interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_LOW>;

		clocks = <&mmsys CLK_MM_DISP_OVL>;

		iommus = <&iommu MT2701_M4U_PORT_DISP_OVL_0>;

		mediatek,larb = <&larb0>;

	};



	rdma0: rdma@14008000 {
@@ -154,7 +152,6 @@ 
		interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>;

		clocks = <&mmsys CLK_MM_DISP_RDMA>;

		iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA>;

		mediatek,larb = <&larb0>;

	};



	wdma@14009000 {
@@ -164,7 +161,6 @@ 
		interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_LOW>;

		clocks = <&mmsys CLK_MM_DISP_WDMA>;

		iommus = <&iommu MT2701_M4U_PORT_DISP_WDMA>;

		mediatek,larb = <&larb0>;

	};



	bls: pwm@1400a000 {
@@ -215,7 +211,6 @@ 
		interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_LOW>;

		clocks = <&mmsys CLK_MM_DISP_RDMA1>;

		iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA1>;

		mediatek,larb = <&larb0>;

	};



	dpi0: dpi@14014000 {