Unverified Commit 9fb9b169 authored by Srinivas Kandagatla's avatar Srinivas Kandagatla Committed by Mark Brown
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ASoC: codecs: wcd934x: add mbhc support 



WCD934x has Multi Button Headset Control hardware to support Headset insertion,
type detection, 8 headset buttons detection, Over Current detection and Impedence
measurements.

This patch adds support for this feature via common mbhc layer.

Signed-off-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20210604115230.23259-4-srinivas.kandagatla@linaro.org


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 0e5c9e7f

include/linux/mfd/wcd934x/registers.h

+57 −0
Original line number Diff line number Diff line
@@ -18,6 +18,8 @@ 
#define WCD934X_EFUSE_SENSE_STATE_DEF				0x10

#define WCD934X_EFUSE_SENSE_EN_MASK				BIT(0)

#define WCD934X_EFUSE_SENSE_ENABLE				BIT(0)

#define WCD934X_CHIP_TIER_CTRL_EFUSE_VAL_OUT1			0x002a

#define WCD934X_CHIP_TIER_CTRL_EFUSE_VAL_OUT2			0x002b

#define WCD934X_CHIP_TIER_CTRL_EFUSE_VAL_OUT14			0x0037

#define WCD934X_CHIP_TIER_CTRL_EFUSE_VAL_OUT15			0x0038

#define WCD934X_CHIP_TIER_CTRL_EFUSE_STATUS			0x0039
@@ -103,21 +105,58 @@ 
#define WCD934X_ANA_AMIC3					0x0610

#define WCD934X_ANA_AMIC4					0x0611

#define WCD934X_ANA_MBHC_MECH					0x0614

#define WCD934X_MBHC_L_DET_EN_MASK				BIT(7)

#define WCD934X_MBHC_L_DET_EN					BIT(7)

#define WCD934X_MBHC_GND_DET_EN_MASK				BIT(6)

#define WCD934X_MBHC_MECH_DETECT_TYPE_MASK			BIT(5)

#define WCD934X_MBHC_MECH_DETECT_TYPE_INS			1

#define WCD934X_MBHC_HPHL_PLUG_TYPE_MASK			BIT(4)

#define WCD934X_MBHC_HPHL_PLUG_TYPE_NO				1

#define WCD934X_MBHC_GND_PLUG_TYPE_MASK				BIT(3)

#define WCD934X_MBHC_GND_PLUG_TYPE_NO				1

#define WCD934X_MBHC_HSL_PULLUP_COMP_EN				BIT(2)

#define WCD934X_MBHC_HSG_PULLUP_COMP_EN				BIT(1)

#define WCD934X_MBHC_HPHL_100K_TO_GND_EN			BIT(0)

#define WCD934X_ANA_MBHC_ELECT					0x0615

#define WCD934X_ANA_MBHC_BIAS_EN_MASK				BIT(0)

#define WCD934X_ANA_MBHC_BIAS_EN				BIT(0)

#define WCD934X_ANA_MBHC_ZDET					0x0616

#define WCD934X_ANA_MBHC_RESULT_1				0x0617

#define WCD934X_ANA_MBHC_RESULT_2				0x0618

#define WCD934X_ANA_MBHC_RESULT_3				0x0619

#define WCD934X_ANA_MBHC_BTN0					0x061a

#define WCD934X_VTH_MASK					GENMASK(7, 2)

#define WCD934X_ANA_MBHC_BTN1					0x061b

#define WCD934X_ANA_MBHC_BTN2					0x061c

#define WCD934X_ANA_MBHC_BTN3					0x061d

#define WCD934X_ANA_MBHC_BTN4					0x061e

#define WCD934X_ANA_MBHC_BTN5					0x061f

#define WCD934X_ANA_MBHC_BTN6					0x0620

#define WCD934X_ANA_MBHC_BTN7					0x0621

#define WCD934X_MBHC_BTN_VTH_MASK				GENMASK(7, 2)

#define WCD934X_ANA_MICB1					0x0622

#define WCD934X_MICB_VAL_MASK					GENMASK(5, 0)

#define WCD934X_ANA_MICB_EN_MASK				GENMASK(7, 6)

#define WCD934X_MICB_DISABLE					0

#define WCD934X_MICB_ENABLE					1

#define WCD934X_MICB_PULL_UP					2

#define WCD934X_MICB_PULL_DOWN					3

#define WCD934X_ANA_MICB_PULL_UP				0x80

#define WCD934X_ANA_MICB_ENABLE					0x40

#define WCD934X_ANA_MICB_DISABLE				0x0

#define WCD934X_ANA_MICB2					0x0623

#define WCD934X_ANA_MICB2_ENABLE				BIT(6)

#define WCD934X_ANA_MICB2_ENABLE_MASK				GENMASK(7, 6)

#define WCD934X_ANA_MICB2_VOUT_MASK				GENMASK(5, 0)

#define WCD934X_ANA_MICB2_RAMP					0x0624

#define WCD934X_RAMP_EN_MASK					BIT(7)

#define WCD934X_RAMP_SHIFT_CTRL_MASK				GENMASK(4, 2)

#define WCD934X_ANA_MICB3					0x0625

#define WCD934X_ANA_MICB4					0x0626

#define WCD934X_BIAS_VBG_FINE_ADJ				0x0629

#define WCD934X_MBHC_CTL_CLK					0x0656

#define WCD934X_MBHC_CTL_BCS					0x065a

#define WCD934X_MBHC_STATUS_SPARE_1				0x065b

#define WCD934X_MICB1_TEST_CTL_1				0x066b

#define WCD934X_MICB1_TEST_CTL_2				0x066c

#define WCD934X_MICB2_TEST_CTL_1				0x066e
@@ -141,7 +180,11 @@ 
#define WCD934X_HPH_CNP_WG_CTL					0x06cc

#define WCD934X_HPH_GM3_BOOST_EN_MASK				BIT(7)

#define WCD934X_HPH_GM3_BOOST_ENABLE				BIT(7)

#define WCD934X_HPH_CNP_WG_TIME					0x06cd

#define WCD934X_HPH_OCP_CTL					0x06ce

#define WCD934X_HPH_PA_CTL2					0x06d2

#define WCD934X_HPHPA_GND_R_MASK				BIT(6)

#define WCD934X_HPHPA_GND_L_MASK				BIT(4)

#define WCD934X_HPH_L_EN					0x06d3

#define WCD934X_HPH_GAIN_SRC_SEL_MASK				BIT(5)

#define WCD934X_HPH_GAIN_SRC_SEL_COMPANDER			0
@@ -152,6 +195,8 @@ 
#define WCD934X_HPH_OCP_DET_MASK				BIT(0)

#define WCD934X_HPH_OCP_DET_ENABLE				BIT(0)

#define WCD934X_HPH_OCP_DET_DISABLE				0

#define WCD934X_HPH_R_ATEST					0x06d8

#define WCD934X_HPHPA_GND_OVR_MASK				BIT(1)

#define WCD934X_DIFF_LO_LO2_COMPANDER				0x06ea

#define WCD934X_DIFF_LO_LO1_COMPANDER				0x06eb

#define WCD934X_CLK_SYS_MCLK_PRG				0x0711
@@ -172,7 +217,19 @@ 
#define WCD934X_SIDO_NEW_VOUT_D_FREQ2				0x071e

#define WCD934X_SIDO_RIPPLE_FREQ_EN_MASK			BIT(0)

#define WCD934X_SIDO_RIPPLE_FREQ_ENABLE				BIT(0)

#define WCD934X_MBHC_NEW_CTL_1					0x0720

#define WCD934X_MBHC_CTL_RCO_EN_MASK				BIT(7)

#define WCD935X_MBHC_CTL_RCO_EN					BIT(7)

#define WCD934X_MBHC_NEW_CTL_2					0x0721

#define WCD934X_M_RTH_CTL_MASK					GENMASK(3, 2)

#define WCD934X_MBHC_NEW_PLUG_DETECT_CTL			0x0722

#define WCD934X_HSDET_PULLUP_C_MASK				GENMASK(7, 6)

#define WCD934X_MBHC_NEW_ZDET_ANA_CTL				0x0723

#define WCD934X_ZDET_RANGE_CTL_MASK				GENMASK(3, 0)

#define WCD934X_ZDET_MAXV_CTL_MASK				GENMASK(6, 4)

#define WCD934X_MBHC_NEW_ZDET_RAMP_CTL				0x0724

#define WCD934X_MBHC_NEW_FSM_STATUS				0x0725

#define WCD934X_MBHC_NEW_ADC_RESULT				0x0726

#define WCD934X_TX_NEW_AMIC_4_5_SEL				0x0727

#define WCD934X_HPH_NEW_INT_RDAC_HD2_CTL_L			0x0733

#define WCD934X_HPH_NEW_INT_RDAC_OVERRIDE_CTL			0x0735

sound/soc/codecs/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -1542,6 +1542,7 @@ config SND_SOC_WCD_MBHC 
config SND_SOC_WCD934X

	tristate "WCD9340/WCD9341 Codec"

	depends on COMMON_CLK

	select SND_SOC_WCD_MBHC

	depends on MFD_WCD934X

	help

	  The WCD9340/9341 is a audio codec IC Integrated in

sound/soc/codecs/wcd934x.c

+869 −15

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