Commit 9f930478 authored by Will Deacon's avatar Will Deacon
Browse files

Merge branch 'for-next/cpufeature' into for-next/core 

* for-next/cpufeature:
  kselftest/arm64: Add SVE 2.1 to hwcap test
  arm64/hwcap: Add support for SVE 2.1
  kselftest/arm64: Add FEAT_RPRFM to the hwcap test
  arm64/hwcap: Add support for FEAT_RPRFM
  kselftest/arm64: Add FEAT_CSSC to the hwcap selftest
  arm64/hwcap: Add support for FEAT_CSSC
  arm64: Enable data independent timing (DIT) in the kernel
parents d49d7c2e c5195b02

Documentation/arm64/elf_hwcaps.rst

+9 −0
Original line number Diff line number Diff line
@@ -275,6 +275,15 @@ HWCAP2_EBF16 
HWCAP2_SVE_EBF16

    Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0010.



HWCAP2_CSSC

    Functionality implied by ID_AA64ISAR2_EL1.CSSC == 0b0001.



HWCAP2_RPRFM

    Functionality implied by ID_AA64ISAR2_EL1.RPRFM == 0b0001.



HWCAP2_SVE2P1

    Functionality implied by ID_AA64ZFR0_EL1.SVEver == 0b0010.



4. Unused AT_HWCAP bits

-----------------------

Documentation/arm64/sve.rst

+1 −0
Original line number Diff line number Diff line
@@ -52,6 +52,7 @@ model features for SVE is included in Appendix A. 
	HWCAP2_SVEBITPERM

	HWCAP2_SVESHA3

	HWCAP2_SVESM4

	HWCAP2_SVE2P1



  This list may be extended over time as the SVE architecture evolves.

arch/arm64/include/asm/hwcap.h

+3 −0
Original line number Diff line number Diff line
@@ -120,6 +120,9 @@ 
#define KERNEL_HWCAP_WFXT		__khwcap2_feature(WFXT)

#define KERNEL_HWCAP_EBF16		__khwcap2_feature(EBF16)

#define KERNEL_HWCAP_SVE_EBF16		__khwcap2_feature(SVE_EBF16)

#define KERNEL_HWCAP_CSSC		__khwcap2_feature(CSSC)

#define KERNEL_HWCAP_RPRFM		__khwcap2_feature(RPRFM)

#define KERNEL_HWCAP_SVE2P1		__khwcap2_feature(SVE2P1)



/*

 * This yields a mask that user programs can use to figure out what

arch/arm64/include/asm/sysreg.h

+8 −4
Original line number Diff line number Diff line
@@ -90,20 +90,24 @@ 
 */

#define pstate_field(op1, op2)		((op1) << Op1_shift | (op2) << Op2_shift)

#define PSTATE_Imm_shift		CRm_shift

#define SET_PSTATE(x, r)		__emit_inst(0xd500401f | PSTATE_ ## r | ((!!x) << PSTATE_Imm_shift))



#define PSTATE_PAN			pstate_field(0, 4)

#define PSTATE_UAO			pstate_field(0, 3)

#define PSTATE_SSBS			pstate_field(3, 1)

#define PSTATE_DIT			pstate_field(3, 2)

#define PSTATE_TCO			pstate_field(3, 4)



#define SET_PSTATE_PAN(x)		__emit_inst(0xd500401f | PSTATE_PAN | ((!!x) << PSTATE_Imm_shift))

#define SET_PSTATE_UAO(x)		__emit_inst(0xd500401f | PSTATE_UAO | ((!!x) << PSTATE_Imm_shift))

#define SET_PSTATE_SSBS(x)		__emit_inst(0xd500401f | PSTATE_SSBS | ((!!x) << PSTATE_Imm_shift))

#define SET_PSTATE_TCO(x)		__emit_inst(0xd500401f | PSTATE_TCO | ((!!x) << PSTATE_Imm_shift))

#define SET_PSTATE_PAN(x)		SET_PSTATE((x), PAN)

#define SET_PSTATE_UAO(x)		SET_PSTATE((x), UAO)

#define SET_PSTATE_SSBS(x)		SET_PSTATE((x), SSBS)

#define SET_PSTATE_DIT(x)		SET_PSTATE((x), DIT)

#define SET_PSTATE_TCO(x)		SET_PSTATE((x), TCO)



#define set_pstate_pan(x)		asm volatile(SET_PSTATE_PAN(x))

#define set_pstate_uao(x)		asm volatile(SET_PSTATE_UAO(x))

#define set_pstate_ssbs(x)		asm volatile(SET_PSTATE_SSBS(x))

#define set_pstate_dit(x)		asm volatile(SET_PSTATE_DIT(x))



#define __SYS_BARRIER_INSN(CRm, op2, Rt) \

	__emit_inst(0xd5000000 | sys_insn(0, 3, 3, (CRm), (op2)) | ((Rt) & 0x1f))

arch/arm64/include/uapi/asm/hwcap.h

+3 −0
Original line number Diff line number Diff line
@@ -93,5 +93,8 @@ 
#define HWCAP2_WFXT		(1UL << 31)

#define HWCAP2_EBF16		(1UL << 32)

#define HWCAP2_SVE_EBF16	(1UL << 33)

#define HWCAP2_CSSC		(1UL << 34)

#define HWCAP2_RPRFM		(1UL << 35)

#define HWCAP2_SVE2P1		(1UL << 36)



#endif /* _UAPI__ASM_HWCAP_H */