Loading arch/mips/bcm47xx/prom.c +8 −0 Original line number Diff line number Diff line Loading @@ -141,6 +141,14 @@ static __init void prom_init_mem(void) break; } /* Ignoring the last page when ddr size is 128M. Cached * accesses to last page is causing the processor to prefetch * using address above 128M stepping out of the ddr address * space. */ if (mem == 0x8000000) mem -= 0x1000; add_memory_region(0, mem, BOOT_MEM_RAM); } Loading arch/mips/mm/highmem.c +1 −0 Original line number Diff line number Diff line #include <linux/module.h> #include <linux/highmem.h> #include <linux/sched.h> #include <linux/smp.h> #include <asm/fixmap.h> #include <asm/tlbflush.h> Loading Loading
arch/mips/bcm47xx/prom.c +8 −0 Original line number Diff line number Diff line Loading @@ -141,6 +141,14 @@ static __init void prom_init_mem(void) break; } /* Ignoring the last page when ddr size is 128M. Cached * accesses to last page is causing the processor to prefetch * using address above 128M stepping out of the ddr address * space. */ if (mem == 0x8000000) mem -= 0x1000; add_memory_region(0, mem, BOOT_MEM_RAM); } Loading
arch/mips/mm/highmem.c +1 −0 Original line number Diff line number Diff line #include <linux/module.h> #include <linux/highmem.h> #include <linux/sched.h> #include <linux/smp.h> #include <asm/fixmap.h> #include <asm/tlbflush.h> Loading