Commit 9f01881b authored by Akhil R's avatar Akhil R Committed by Bartosz Golaszewski
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dt-bindings: gpio: Add Tegra241 support 



Add the port definitions for the main and AON GPIO controllers found on
Tegra241 (Grace).

Signed-off-by: default avatarAkhil R <akhilrajeev@nvidia.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
Signed-off-by: default avatarBartosz Golaszewski <brgl@bgdev.pl>
parent e85dd53a

include/dt-bindings/gpio/tegra241-gpio.h

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/* SPDX-License-Identifier: GPL-2.0 */

/* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. */



/*

 * This header provides constants for the nvidia,tegra241-gpio DT binding.

 *

 * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below

 * provide names for this.

 *

 * The second cell contains standard flag values specified in gpio.h.

 */



#ifndef _DT_BINDINGS_GPIO_TEGRA241_GPIO_H

#define _DT_BINDINGS_GPIO_TEGRA241_GPIO_H



#include <dt-bindings/gpio/gpio.h>



/* GPIOs implemented by main GPIO controller */

#define TEGRA241_MAIN_GPIO_PORT_A 0

#define TEGRA241_MAIN_GPIO_PORT_B 1

#define TEGRA241_MAIN_GPIO_PORT_C 2

#define TEGRA241_MAIN_GPIO_PORT_D 3

#define TEGRA241_MAIN_GPIO_PORT_E 4

#define TEGRA241_MAIN_GPIO_PORT_F 5

#define TEGRA241_MAIN_GPIO_PORT_G 6

#define TEGRA241_MAIN_GPIO_PORT_H 7

#define TEGRA241_MAIN_GPIO_PORT_I 8

#define TEGRA241_MAIN_GPIO_PORT_J 9

#define TEGRA241_MAIN_GPIO_PORT_K 10

#define TEGRA241_MAIN_GPIO_PORT_L 11



#define TEGRA241_MAIN_GPIO(port, offset) \

	((TEGRA241_MAIN_GPIO_PORT_##port * 8) + (offset))



/* GPIOs implemented by AON GPIO controller */

#define TEGRA241_AON_GPIO_PORT_AA 0

#define TEGRA241_AON_GPIO_PORT_BB 1



#define TEGRA241_AON_GPIO(port, offset) \

	((TEGRA241_AON_GPIO_PORT_##port * 8) + (offset))



#endif