Commit 9edcfaa3 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge tag 'phy-for-5.18' of... 

Merge tag 'phy-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next

Vinod writes:

phy-for-5.18

  - New support:
        - Mediatek tphy support for MT8186
	- Qualcomm usb phy support for sc8180x and sc8280xp
	- Qualcomm ufs phy support for sc8180x and sc8280xp
	- Qualcomm usb phy support for MSM8953
	- Cadence D-Phy Rx support
	- Sun4i support for USB phy
	- Rockchip naneng combo phy support for RK3568
	- Qualcomm eDP PHY for sc7280

  - Updates:
        - wake on support for Synopsis XHCI controllers
	- Yamilify Qualcomm USB HS phy binding
	- Charger detection support for TI tusb1210

* tag 'phy-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (53 commits)
  phy: qcom-qmp: add sc8280xp UFS PHY
  dt-bindings: phy: qcom,qmp: add sc8180x and sc8280xp ufs compatibles
  phy: qcom-snps: Add sc8280xp support
  dt-bindings: phy: qcom,usb-snps-femto-v2: Add sc8180x and sc8280xp
  dt-bindings: Revert "dt-bindings: soc: grf: add naneng combo phy register compatible"
  phy: dt-bindings: Add Cadence D-PHY Rx bindings
  phy: dt-bindings: cdns,dphy: add power-domains property
  phy: dt-bindings: Convert Cadence DPHY binding to YAML
  phy: cadence: Add Cadence D-PHY Rx driver
  dt-bindings: phy: renesas,usb2-phy: Document RZ/V2L phy bindings
  Revert "PCI: aardvark: Fix initialization with old Marvell's Arm Trusted Firmware"
  Revert "usb: host: xhci: mvebu: make USB 3.0 PHY optional for Armada 3720"
  Revert "ata: ahci: mvebu: Make SATA PHY optional for Armada 3720"
  phy: marvell: phy-mvebu-a3700-comphy: Add native kernel implementation
  phy: marvell: phy-mvebu-a3700-comphy: Remove port from driver configuration
  phy: phy-brcm-usb: fixup BCM4908 support
  dt-bindings: phy: mediatek,tphy: Add compatible for MT8192
  phy: ti: tusb1210: Add charger detection
  phy: ti: tusb1210: Add a delay between power-on and restoring the phy-parameters
  phy: ti: tusb1210: Drop tusb->vendor_specific2 != 0 check from tusb1210_power_on()
  ...
parents 57b1659f c6455af5

Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.yaml

+3 −1
Original line number Diff line number Diff line
@@ -15,7 +15,9 @@ properties: 
    const: 1



  compatible:

    const: allwinner,sun50i-a64-usb-phy

    enum:

      - allwinner,sun20i-d1-usb-phy

      - allwinner,sun50i-a64-usb-phy



  reg:

    items:

Documentation/devicetree/bindings/phy/cdns,dphy-rx.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/phy/cdns,dphy-rx.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Cadence DPHY Rx Device Tree Bindings



maintainers:

  - Pratyush Yadav <p.yadav@ti.com>



properties:

  compatible:

    items:

      - const: cdns,dphy-rx



  reg:

    maxItems: 1



  "#phy-cells":

    const: 0



  power-domains:

    maxItems: 1



required:

  - compatible

  - reg

  - "#phy-cells"



additionalProperties: false



examples:

  - |

    #include <dt-bindings/soc/ti,sci_pm_domain.h>



    dphy0: phy@4580000 {

        compatible = "cdns,dphy-rx";

        reg = <0x4580000 0x1100>;

        #phy-cells = <0>;

        power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;

    };

Documentation/devicetree/bindings/phy/cdns,dphy.txt

deleted100644 → 0
+0 −20
Original line number Diff line number Diff line 
Cadence DPHY

============



Cadence DPHY block.



Required properties:

- compatible: should be set to "cdns,dphy".

- reg: physical base address and length of the DPHY registers.

- clocks: DPHY reference clocks.

- clock-names: must contain "psm" and "pll_ref".

- #phy-cells: must be set to 0.



Example:

	dphy0: dphy@fd0e0000{

		compatible = "cdns,dphy";

		reg = <0x0 0xfd0e0000 0x0 0x1000>;

		clocks = <&psm_clk>, <&pll_ref_clk>;

		clock-names = "psm", "pll_ref";

		#phy-cells = <0>;

	};

Documentation/devicetree/bindings/phy/cdns,dphy.yaml

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+56 −0
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/phy/cdns,dphy.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Cadence DPHY Device Tree Bindings



maintainers:

  - Pratyush Yadav <p.yadav@ti.com>



properties:

  compatible:

    items:

      - const: cdns,dphy



  reg:

    maxItems: 1



  clocks:

    items:

      - description: PMA state machine clock

      - description: PLL reference clock



  clock-names:

    items:

      - const: psm

      - const: pll_ref



  "#phy-cells":

    const: 0



  power-domains:

    maxItems: 1



required:

  - compatible

  - reg

  - clocks

  - clock-names

  - "#phy-cells"



additionalProperties: false



examples:

  - |

    #include <dt-bindings/soc/ti,sci_pm_domain.h>



    dphy0: phy@fd0e0000{

        compatible = "cdns,dphy";

        reg = <0xfd0e0000 0x1000>;

        clocks = <&psm_clk>, <&pll_ref_clk>;

        clock-names = "psm", "pll_ref";

        power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;

        #phy-cells = <0>;

    };

Documentation/devicetree/bindings/phy/mediatek,tphy.yaml

+2 −0
Original line number Diff line number Diff line
@@ -80,6 +80,8 @@ properties: 
              - mediatek,mt2712-tphy

              - mediatek,mt7629-tphy

              - mediatek,mt8183-tphy

              - mediatek,mt8186-tphy

              - mediatek,mt8192-tphy

          - const: mediatek,generic-tphy-v2

      - items:

          - enum: