Commit 9ea0c7b3 authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Geert Uytterhoeven
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arm64: dts: renesas: r9a07g044: Add CANFD node 



Add CANFD node to R9A07G044 (RZ/G2L) SoC DTSI.

Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210727133022.634-4-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent fb210df3

arch/arm64/boot/dts/renesas/r9a07g044.dtsi

+41 −0
Original line number Diff line number Diff line
@@ -13,6 +13,13 @@ 
	#address-cells = <2>;

	#size-cells = <2>;



	/* External CAN clock - to be overridden by boards that provide it */

	can_clk: can {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <0>;

	};



	/* clock can be either from exclk or crystal oscillator (XIN/XOUT) */

	extal_clk: extal {

		compatible = "fixed-clock";
@@ -89,6 +96,40 @@ 
			status = "disabled";

		};



		canfd: can@10050000 {

			compatible = "renesas,r9a07g044-canfd", "renesas,rzg2l-canfd";

			reg = <0 0x10050000 0 0x8000>;

			interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "g_err", "g_recc",

					  "ch0_err", "ch0_rec", "ch0_trx",

					  "ch1_err", "ch1_rec", "ch1_trx";

			clocks = <&cpg CPG_MOD R9A07G044_CANFD_PCLK>,

				 <&cpg CPG_CORE R9A07G044_CLK_P0_DIV2>,

				 <&can_clk>;

			clock-names = "fck", "canfd", "can_clk";

			assigned-clocks = <&cpg CPG_CORE R9A07G044_CLK_P0_DIV2>;

			assigned-clock-rates = <50000000>;

			resets = <&cpg R9A07G044_CANFD_RSTP_N>,

				 <&cpg R9A07G044_CANFD_RSTC_N>;

			reset-names = "rstp_n", "rstc_n";

			power-domains = <&cpg>;

			status = "disabled";



			channel0 {

				status = "disabled";

			};

			channel1 {

				status = "disabled";

			};

		};



		i2c0: i2c@10058000 {

			#address-cells = <1>;

			#size-cells = <0>;