Merge tag 'amd-drm-next-6.2-2022-12-02' of https://gitlab.freedesktop.org/agd5f/linux into drm-next

    EOP

      End Of Pipe/Pipeline

    GART

      Graphics Address Remapping Table.  This is the name we use for the GPUVM

      page table used by the GPU kernel driver.  It remaps system resources

      (memory or MMIO space) into the GPU's address space so the GPU can access

      them.  The name GART harkens back to the days of AGP when the platform

      provided an MMU that the GPU could use to get a contiguous view of

      scattered pages for DMA.  The MMU has since moved on to the GPU, but the

      name stuck.

    GC

      Graphics and Compute

    GMC

      Graphic Memory Controller

    GPUVM

      GPU Virtual Memory.  This is the GPU's MMU.  The GPU supports multiple

      virtual address spaces that can be in flight at any given time.  These

      allow the GPU to remap VRAM and system resources into GPU virtual address

      spaces for use by the GPU kernel driver and applications using the GPU.

      These provide memory protection for different applications using the GPU.

    GTT

      Graphics Translation Tables.  This is a memory pool managed through TTM

      which provides access to system resources (memory or MMIO space) for

      use by the GPU. These addresses can be mapped into the "GART" GPUVM page

      table for use by the kernel driver or into per process GPUVM page tables

      for application usage.

    IH

      Interrupt Handler

MMU Notifier

============

.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c

.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.c

   :doc: MMU Notifier

.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c

.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.c

   :internal:

AMDGPU Virtual Memory

==========================

The drm/amdgpu driver supports all AMD Radeon GPUs based on the Graphics Core

Next (GCN) architecture.

Next (GCN), Radeon DNA (RDNA), and Compute DNA (CDNA) architectures.

.. toctree::

	amdgpu_vm_sdma.o amdgpu_discovery.o amdgpu_ras_eeprom.o amdgpu_nbio.o \

	amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \

	amdgpu_fw_attestation.o amdgpu_securedisplay.o \

	amdgpu_eeprom.o amdgpu_mca.o amdgpu_psp_ta.o amdgpu_lsdma.o

	amdgpu_eeprom.o amdgpu_mca.o amdgpu_psp_ta.o amdgpu_lsdma.o \

	amdgpu_ring_mux.o

amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o

	ret = drm_vma_node_allow(&obj->vma_node, drm_priv);

	if (ret) {

		kfree(mem);

		kfree(*mem);

		return ret;

	}