Commit 9e36fa42 authored by WANG Xuerui's avatar WANG Xuerui Committed by Huacai Chen
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LoongArch: Clean up the architectural interrupt definitions 



While interrupts are assigned ECodes `64 + interrupt number`, all
existing use sites of interrupt numbers want the 64 subtracted.
Re-arrange the definitions so that the actual interrupt number is used
everywhere, and make EXCCODE_INT_END inclusive as it is more intuitive
that way.

While at it, according to the asm/loongarch.h definitions, the total
number of architectural interrupts should be 14, but various other
places indicate otherwise (13 or 15). Those places have been adjusted
to 14 as well for consistency.

Signed-off-by: default avatarWANG Xuerui <git@xen0n.name>
Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
parent 3b5a5672

arch/loongarch/include/asm/loongarch.h

+25 −22
Original line number Diff line number Diff line
@@ -311,8 +311,8 @@ static __always_inline void iocsr_write64(u64 val, u32 reg) 
#define  CSR_ECFG_VS_WIDTH		3

#define  CSR_ECFG_VS			(_ULCAST_(0x7) << CSR_ECFG_VS_SHIFT)

#define  CSR_ECFG_IM_SHIFT		0

#define  CSR_ECFG_IM_WIDTH		13

#define  CSR_ECFG_IM			(_ULCAST_(0x1fff) << CSR_ECFG_IM_SHIFT)

#define  CSR_ECFG_IM_WIDTH		14

#define  CSR_ECFG_IM			(_ULCAST_(0x3fff) << CSR_ECFG_IM_SHIFT)



#define LOONGARCH_CSR_ESTAT		0x5	/* Exception status */

#define  CSR_ESTAT_ESUBCODE_SHIFT	22
@@ -322,8 +322,8 @@ static __always_inline void iocsr_write64(u64 val, u32 reg) 
#define  CSR_ESTAT_EXC_WIDTH		6

#define  CSR_ESTAT_EXC			(_ULCAST_(0x3f) << CSR_ESTAT_EXC_SHIFT)

#define  CSR_ESTAT_IS_SHIFT		0

#define  CSR_ESTAT_IS_WIDTH		15

#define  CSR_ESTAT_IS			(_ULCAST_(0x7fff) << CSR_ESTAT_IS_SHIFT)

#define  CSR_ESTAT_IS_WIDTH		14

#define  CSR_ESTAT_IS			(_ULCAST_(0x3fff) << CSR_ESTAT_IS_SHIFT)



#define LOONGARCH_CSR_ERA		0x6	/* ERA */
@@ -1090,7 +1090,7 @@ static __always_inline void iocsr_write64(u64 val, u32 reg) 
#define ECFGF_IPI		(_ULCAST_(1) << ECFGB_IPI)

#define ECFGF(hwirq)		(_ULCAST_(1) << hwirq)



#define ESTATF_IP		0x00001fff

#define ESTATF_IP		0x00003fff



#define LOONGARCH_IOCSR_FEATURES	0x8

#define  IOCSRF_TEMP			BIT_ULL(0)
@@ -1418,23 +1418,26 @@ __BUILD_CSR_OP(tlbidx) 
	#define EXCSUBCODE_GCHC		1	/* Hardware caused */

#define EXCCODE_SE		25	/* Security */



/* Interrupt numbers */

#define INT_SWI0	0	/* Software Interrupts */

#define INT_SWI1	1

#define INT_HWI0	2	/* Hardware Interrupts */

#define INT_HWI1	3

#define INT_HWI2	4

#define INT_HWI3	5

#define INT_HWI4	6

#define INT_HWI5	7

#define INT_HWI6	8

#define INT_HWI7	9

#define INT_PCOV	10	/* Performance Counter Overflow */

#define INT_TI		11	/* Timer */

#define INT_IPI		12

#define INT_NMI		13



/* ExcCodes corresponding to interrupts */

#define EXCCODE_INT_NUM		(INT_NMI + 1)

#define EXCCODE_INT_START	64

#define EXCCODE_SIP0        64

#define EXCCODE_SIP1        65

#define EXCCODE_IP0         66

#define EXCCODE_IP1         67

#define EXCCODE_IP2         68

#define EXCCODE_IP3         69

#define EXCCODE_IP4         70

#define EXCCODE_IP5         71

#define EXCCODE_IP6         72

#define EXCCODE_IP7         73

#define EXCCODE_PMC         74 /* Performance Counter */

#define EXCCODE_TIMER       75

#define EXCCODE_IPI         76

#define EXCCODE_NMI         77

#define EXCCODE_INT_END     78

#define EXCCODE_INT_NUM	    (EXCCODE_INT_END - EXCCODE_INT_START)

#define EXCCODE_INT_END		(EXCCODE_INT_START + EXCCODE_INT_NUM - 1)



/* FPU register names */

#define LOONGARCH_FCSR0	$r0

arch/loongarch/kernel/irq.c

+1 −1
Original line number Diff line number Diff line
@@ -92,7 +92,7 @@ static int __init get_ipi_irq(void) 
	struct irq_domain *d = irq_find_matching_fwnode(cpuintc_handle, DOMAIN_BUS_ANY);



	if (d)

		return irq_create_mapping(d, EXCCODE_IPI - EXCCODE_INT_START);

		return irq_create_mapping(d, INT_IPI);



	return -EINVAL;

}

arch/loongarch/kernel/perf_event.c

+1 −1
Original line number Diff line number Diff line
@@ -461,7 +461,7 @@ static int get_pmc_irq(void) 
	struct irq_domain *d = irq_find_matching_fwnode(cpuintc_handle, DOMAIN_BUS_ANY);



	if (d)

		return irq_create_mapping(d, EXCCODE_PMC - EXCCODE_INT_START);

		return irq_create_mapping(d, INT_PCOV);



	return -EINVAL;

}

arch/loongarch/kernel/time.c

+1 −1
Original line number Diff line number Diff line
@@ -133,7 +133,7 @@ static int get_timer_irq(void) 
	struct irq_domain *d = irq_find_matching_fwnode(cpuintc_handle, DOMAIN_BUS_ANY);



	if (d)

		return irq_create_mapping(d, EXCCODE_TIMER - EXCCODE_INT_START);

		return irq_create_mapping(d, INT_TI);



	return -EINVAL;

}

arch/loongarch/kernel/traps.c

+1 −1
Original line number Diff line number Diff line
@@ -792,7 +792,7 @@ void __init trap_init(void) 
	long i;



	/* Set interrupt vector handler */

	for (i = EXCCODE_INT_START; i < EXCCODE_INT_END; i++)

	for (i = EXCCODE_INT_START; i <= EXCCODE_INT_END; i++)

		set_handler(i * VECSIZE, handle_vint, VECSIZE);



	set_handler(EXCCODE_ADE * VECSIZE, handle_ade, VECSIZE);