Commit 9e314890 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'openrisc-for-linus' of git://github.com/openrisc/linux 

Pull OpenRISC updates from Stafford Horne:
 "Highlights include:

   - optimized memset and memcpy routines, ~20% boot time saving

   - support for cpu idling

   - adding support for l.swa and l.lwa atomic operations (in spec from
     2014)

   - use atomics to implement: bitops, cmpxchg, futex

   - the atomics are in preparation for SMP support"

* tag 'openrisc-for-linus' of git://github.com/openrisc/linux: (25 commits)
  openrisc: head: Init r0 to 0 on start
  openrisc: Export ioremap symbols used by modules
  arch/openrisc/lib/memcpy.c: use correct OR1200 option
  openrisc: head: Remove unused strings
  openrisc: head: Move init strings to rodata section
  openrisc: entry: Fix delay slot detection
  openrisc: entry: Whitespace and comment cleanups
  scripts/checkstack.pl: Add openrisc support
  MAINTAINERS: Add the openrisc official repository
  openrisc: Add .gitignore
  openrisc: Add optimized memcpy routine
  openrisc: Add optimized memset
  openrisc: Initial support for the idle state
  openrisc: Fix the bitmask for the unit present register
  openrisc: remove unnecessary stddef.h include
  openrisc: add futex_atomic_* implementations
  openrisc: add optimized atomic operations
  openrisc: add cmpxchg and xchg implementations
  openrisc: add atomic bitops
  openrisc: add l.lwa/l.swa emulation
  ...
parents f8e6859e a4d44266

MAINTAINERS

+1 −0
Original line number Original line Diff line number Diff line
@@ -9315,6 +9315,7 @@ OPENRISC ARCHITECTURE 
M:	Jonas Bonn <jonas@southpole.se>

M:	Jonas Bonn <jonas@southpole.se>

M:	Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>

M:	Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>

M:	Stafford Horne <shorne@gmail.com>

M:	Stafford Horne <shorne@gmail.com>

T:	git git://github.com/openrisc/linux.git

L:	openrisc@lists.librecores.org

L:	openrisc@lists.librecores.org

W:	http://openrisc.io

W:	http://openrisc.io

S:	Maintained

S:	Maintained

arch/openrisc/Kconfig

+1 −0
Original line number Original line Diff line number Diff line
@@ -12,6 +12,7 @@ config OPENRISC 
	select HAVE_MEMBLOCK

	select HAVE_MEMBLOCK

	select GPIOLIB

	select GPIOLIB

        select HAVE_ARCH_TRACEHOOK

        select HAVE_ARCH_TRACEHOOK

	select SPARSE_IRQ

	select GENERIC_IRQ_CHIP

	select GENERIC_IRQ_CHIP

	select GENERIC_IRQ_PROBE

	select GENERIC_IRQ_PROBE

	select GENERIC_IRQ_SHOW

	select GENERIC_IRQ_SHOW

arch/openrisc/TODO.openrisc

+0 −1
Original line number Original line Diff line number Diff line
@@ -10,4 +10,3 @@ that are due for investigation shortly, i.e. our TODO list: 
   or1k and this change is slowly trickling through the stack.  For the time

   or1k and this change is slowly trickling through the stack.  For the time

   being, or32 is equivalent to or1k.

   being, or32 is equivalent to or1k.

-- Implement optimized version of memcpy and memset

arch/openrisc/include/asm/Kbuild

+1 −4
Original line number Original line Diff line number Diff line 




header-y += ucontext.h

header-y += ucontext.h





generic-y += atomic.h

generic-y += auxvec.h

generic-y += auxvec.h

generic-y += barrier.h

generic-y += barrier.h

generic-y += bitsperlong.h

generic-y += bitsperlong.h
@@ -10,8 +9,6 @@ generic-y += bugs.h 
generic-y += cacheflush.h

generic-y += cacheflush.h

generic-y += checksum.h

generic-y += checksum.h

generic-y += clkdev.h

generic-y += clkdev.h

generic-y += cmpxchg-local.h

generic-y += cmpxchg.h

generic-y += current.h

generic-y += current.h

generic-y += device.h

generic-y += device.h

generic-y += div64.h

generic-y += div64.h
@@ -22,12 +19,12 @@ generic-y += exec.h 
generic-y += fb.h

generic-y += fb.h

generic-y += fcntl.h

generic-y += fcntl.h

generic-y += ftrace.h

generic-y += ftrace.h

generic-y += futex.h

generic-y += hardirq.h

generic-y += hardirq.h

generic-y += hw_irq.h

generic-y += hw_irq.h

generic-y += ioctl.h

generic-y += ioctl.h

generic-y += ioctls.h

generic-y += ioctls.h

generic-y += ipcbuf.h

generic-y += ipcbuf.h

generic-y += irq.h

generic-y += irq_regs.h

generic-y += irq_regs.h

generic-y += irq_work.h

generic-y += irq_work.h

generic-y += kdebug.h

generic-y += kdebug.h

arch/openrisc/include/asm/atomic.h

0 → 100644
+126 −0
Original line number Original line Diff line number Diff line 
/*

 * Copyright (C) 2014 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>

 *

 * This file is licensed under the terms of the GNU General Public License

 * version 2.  This program is licensed "as is" without any warranty of any

 * kind, whether express or implied.

 */



#ifndef __ASM_OPENRISC_ATOMIC_H

#define __ASM_OPENRISC_ATOMIC_H



#include <linux/types.h>



/* Atomically perform op with v->counter and i */

#define ATOMIC_OP(op)							\

static inline void atomic_##op(int i, atomic_t *v)			\

{									\

	int tmp;							\

									\

	__asm__ __volatile__(						\

		"1:	l.lwa	%0,0(%1)	\n"			\

		"	l." #op " %0,%0,%2	\n"			\

		"	l.swa	0(%1),%0	\n"			\

		"	l.bnf	1b		\n"			\

		"	 l.nop			\n"			\

		: "=&r"(tmp)						\

		: "r"(&v->counter), "r"(i)				\

		: "cc", "memory");					\

}



/* Atomically perform op with v->counter and i, return the result */

#define ATOMIC_OP_RETURN(op)						\

static inline int atomic_##op##_return(int i, atomic_t *v)		\

{									\

	int tmp;							\

									\

	__asm__ __volatile__(						\

		"1:	l.lwa	%0,0(%1)	\n"			\

		"	l." #op " %0,%0,%2	\n"			\

		"	l.swa	0(%1),%0	\n"			\

		"	l.bnf	1b		\n"			\

		"	 l.nop			\n"			\

		: "=&r"(tmp)						\

		: "r"(&v->counter), "r"(i)				\

		: "cc", "memory");					\

									\

	return tmp;							\

}



/* Atomically perform op with v->counter and i, return orig v->counter */

#define ATOMIC_FETCH_OP(op)						\

static inline int atomic_fetch_##op(int i, atomic_t *v)			\

{									\

	int tmp, old;							\

									\

	__asm__ __volatile__(						\

		"1:	l.lwa	%0,0(%2)	\n"			\

		"	l." #op " %1,%0,%3	\n"			\

		"	l.swa	0(%2),%1	\n"			\

		"	l.bnf	1b		\n"			\

		"	 l.nop			\n"			\

		: "=&r"(old), "=&r"(tmp)				\

		: "r"(&v->counter), "r"(i)				\

		: "cc", "memory");					\

									\

	return old;							\

}



ATOMIC_OP_RETURN(add)

ATOMIC_OP_RETURN(sub)



ATOMIC_FETCH_OP(add)

ATOMIC_FETCH_OP(sub)

ATOMIC_FETCH_OP(and)

ATOMIC_FETCH_OP(or)

ATOMIC_FETCH_OP(xor)



ATOMIC_OP(and)

ATOMIC_OP(or)

ATOMIC_OP(xor)



#undef ATOMIC_FETCH_OP

#undef ATOMIC_OP_RETURN

#undef ATOMIC_OP



#define atomic_add_return	atomic_add_return

#define atomic_sub_return	atomic_sub_return

#define atomic_fetch_add	atomic_fetch_add

#define atomic_fetch_sub	atomic_fetch_sub

#define atomic_fetch_and	atomic_fetch_and

#define atomic_fetch_or		atomic_fetch_or

#define atomic_fetch_xor	atomic_fetch_xor

#define atomic_and	atomic_and

#define atomic_or	atomic_or

#define atomic_xor	atomic_xor



/*

 * Atomically add a to v->counter as long as v is not already u.

 * Returns the original value at v->counter.

 *

 * This is often used through atomic_inc_not_zero()

 */

static inline int __atomic_add_unless(atomic_t *v, int a, int u)

{

	int old, tmp;



	__asm__ __volatile__(

		"1:	l.lwa %0, 0(%2)		\n"

		"	l.sfeq %0, %4		\n"

		"	l.bf 2f			\n"

		"	 l.add %1, %0, %3	\n"

		"	l.swa 0(%2), %1		\n"

		"	l.bnf 1b		\n"

		"	 l.nop			\n"

		"2:				\n"

		: "=&r"(old), "=&r" (tmp)

		: "r"(&v->counter), "r"(a), "r"(u)

		: "cc", "memory");



	return old;

}

#define __atomic_add_unless	__atomic_add_unless



#include <asm-generic/atomic.h>



#endif /* __ASM_OPENRISC_ATOMIC_H */