Commit 9dd4545f authored by Slark Xiao's avatar Slark Xiao Committed by Alex Deucher
Browse files

drm/amd: Fix typo 'the the' in comment



Replace 'the the' with 'the' in the comment.

Signed-off-by: default avatarSlark Xiao <slark_xiao@163.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 86e4863e
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+1 −1
Original line number Diff line number Diff line
@@ -47,7 +47,7 @@
 * for GPU/CPU synchronization.  When the fence is written,
 * it is expected that all buffers associated with that fence
 * are no longer in use by the associated ring on the GPU and
 * that the the relevant GPU caches have been flushed.
 * that the relevant GPU caches have been flushed.
 */

struct amdgpu_fence {
+2 −2
Original line number Diff line number Diff line
@@ -3255,8 +3255,8 @@ ucMaxNBVoltageHigh: Voltage regulator dependent PWM value. High 8 bits of t
ucMinNBVoltageHigh:     Voltage regulator dependent PWM value. High 8 bits of the value for the min voltage.Set this one to 0x00 if VC without PWM or no VC at all.


usInterNBVoltageLow:    Voltage regulator dependent PWM value. The value makes the the voltage >=Min NB voltage but <=InterNBVoltageHigh. Set this to 0x0000 if VC without PWM or no VC at all.
usInterNBVoltageHigh:   Voltage regulator dependent PWM value. The value makes the the voltage >=InterNBVoltageLow but <=Max NB voltage.Set this to 0x0000 if VC without PWM or no VC at all.
usInterNBVoltageLow:    Voltage regulator dependent PWM value. The value makes the voltage >=Min NB voltage but <=InterNBVoltageHigh. Set this to 0x0000 if VC without PWM or no VC at all.
usInterNBVoltageHigh:   Voltage regulator dependent PWM value. The value makes the voltage >=InterNBVoltageLow but <=Max NB voltage.Set this to 0x0000 if VC without PWM or no VC at all.
*/