Loading arch/x86/lib/retpoline.S +19 −0 Original line number Diff line number Diff line Loading @@ -186,6 +186,25 @@ SYM_CODE_START(srso_alias_return_thunk) ud2 SYM_CODE_END(srso_alias_return_thunk) /* * Some generic notes on the untraining sequences: * * They are interchangeable when it comes to flushing potentially wrong * RET predictions from the BTB. * * The SRSO Zen1/2 (MOVABS) untraining sequence is longer than the * Retbleed sequence because the return sequence done there * (srso_safe_ret()) is longer and the return sequence must fully nest * (end before) the untraining sequence. Therefore, the untraining * sequence must fully overlap the return sequence. * * Regarding alignment - the instructions which need to be untrained, * must all start at a cacheline boundary for Zen1/2 generations. That * is, instruction sequences starting at srso_safe_ret() and * the respective instruction sequences at retbleed_return_thunk() * must start at a cacheline boundary. */ /* * Safety details here pertain to the AMD Zen{1,2} microarchitecture: * 1) The RET at retbleed_return_thunk must be on a 64 byte boundary, for Loading Loading
arch/x86/lib/retpoline.S +19 −0 Original line number Diff line number Diff line Loading @@ -186,6 +186,25 @@ SYM_CODE_START(srso_alias_return_thunk) ud2 SYM_CODE_END(srso_alias_return_thunk) /* * Some generic notes on the untraining sequences: * * They are interchangeable when it comes to flushing potentially wrong * RET predictions from the BTB. * * The SRSO Zen1/2 (MOVABS) untraining sequence is longer than the * Retbleed sequence because the return sequence done there * (srso_safe_ret()) is longer and the return sequence must fully nest * (end before) the untraining sequence. Therefore, the untraining * sequence must fully overlap the return sequence. * * Regarding alignment - the instructions which need to be untrained, * must all start at a cacheline boundary for Zen1/2 generations. That * is, instruction sequences starting at srso_safe_ret() and * the respective instruction sequences at retbleed_return_thunk() * must start at a cacheline boundary. */ /* * Safety details here pertain to the AMD Zen{1,2} microarchitecture: * 1) The RET at retbleed_return_thunk must be on a 64 byte boundary, for Loading