Unverified Commit 9d7b3078 authored Dec 17, 2021 by Geert Uytterhoeven Committed by Palmer Dabbelt Jan 09, 2022

riscv: dts: microchip: mpfs: Fix reference clock node

"make dtbs_check" reports:

arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: soc: refclk: {'compatible': ['fixed-clock'], '#clock-cells': [[0]], 'clock-frequency': [[600000000]], 'clock-output-names': ['msspllclk'], 'phandle': [[7]]} should not be valid under {'type': 'object'}
From schema: dtschema/schemas/simple-bus.yaml

Fix this by moving the node out of the "soc" subnode.
While at it, rename it to "msspllclk", and drop the now superfluous
"clock-output-names" property.
Move the actual clock-frequency value to the board DTS, since it is not
set until bitstream programming time.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

parent 53abf980

arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts

+4 −0

Original line number	Diff line number	Diff line
		@@ -35,6 +35,10 @@
		};
		};

		&refclk {
		clock-frequency = <600000000>;
		};

		&serial0 {
		status = "okay";
		};

arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi

+5 −7

Original line number	Diff line number	Diff line
		@@ -139,6 +139,11 @@
		};
		};

		refclk: msspllclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		};

		soc {
		#address-cells = <2>;
		#size-cells = <2>;
		@@ -189,13 +194,6 @@
		#dma-cells = <1>;
		};

		refclk: refclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <600000000>;
		clock-output-names = "msspllclk";
		};

		clkcfg: clkcfg@20002000 {
		compatible = "microchip,mpfs-clkcfg";
		reg = <0x0 0x20002000 0x0 0x1000>;