Commit 9d7370a5 authored by AngeloGioacchino Del Regno's avatar AngeloGioacchino Del Regno Committed by Matthias Brugger
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soc: mediatek: mmsys: Add sw0_rst_offset for MT8192 



MT8192 has the same sw0 reset offset as MT8186: add the parameter
to be able to use mmsys as a reset controller for managing at
least the DSI reset line.

Signed-off-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: default avatarRex-BC Chen <rex-bc.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220323091932.10648-1-angelogioacchino.delregno@collabora.com


Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 31231092

drivers/soc/mediatek/mtk-mmsys.c

+1 −0
Original line number Diff line number Diff line
@@ -70,6 +70,7 @@ static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data = { 
	.clk_driver = "clk-mt8192-mm",

	.routes = mmsys_mt8192_routing_table,

	.num_routes = ARRAY_SIZE(mmsys_mt8192_routing_table),

	.sw0_rst_offset = MT8186_MMSYS_SW0_RST_B,

};



static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = {