Commit 9d6b648c authored by Michael Chan's avatar Michael Chan Committed by David S. Miller
Browse files

bnxt_en: Update firmware interface spec to 1.10.1.65.



The main changes include FEC, ECN statistics, HWRM_PORT_PHY_QCFG
response size reduction, and a new counter added to
ctx_hw_stats_ext struct to support the new 58818 chip.

The ctx_hw_stats_ext structure is now the superset supporting the new
58818 chips and the prior P5 chips.  Add a new flag to identify the new
chip and use constants for the chip specific ring statistics sizes
instead of the size of the structure.

Because the HWRM_PORT_PHY_QCFG response structure size has shrunk back
to 96 bytes, the workaround added earlier to limit the size of this
message for forwarding to the VF can be removed.

Signed-off-by: default avatarMichael Chan <michael.chan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent e6221295
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+11 −5
Original line number Diff line number Diff line
@@ -5343,13 +5343,16 @@ static int bnxt_hwrm_vnic_qcaps(struct bnxt *bp)
		 * VLAN_STRIP_CAP properly.
		 */
		if ((flags & VNIC_QCAPS_RESP_FLAGS_VLAN_STRIP_CAP) ||
		    ((bp->flags & BNXT_FLAG_CHIP_P5) &&
		    (BNXT_CHIP_P5_THOR(bp) &&
		     !(bp->fw_cap & BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED)))
			bp->fw_cap |= BNXT_FW_CAP_VLAN_RX_STRIP;
		bp->max_tpa_v2 = le16_to_cpu(resp->max_aggs_supported);
		if (bp->max_tpa_v2)
			bp->hw_ring_stats_size =
				sizeof(struct ctx_hw_stats_ext);
		if (bp->max_tpa_v2) {
			if (BNXT_CHIP_P5_THOR(bp))
				bp->hw_ring_stats_size = BNXT_RING_STATS_SIZE_P5;
			else
				bp->hw_ring_stats_size = BNXT_RING_STATS_SIZE_P5_SR2;
		}
	}
	mutex_unlock(&bp->hwrm_cmd_lock);
	return rc;
@@ -12233,8 +12236,11 @@ static int bnxt_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
	if (rc)
		goto init_err_pci_clean;

	if (BNXT_CHIP_P5(bp))
	if (BNXT_CHIP_P5(bp)) {
		bp->flags |= BNXT_FLAG_CHIP_P5;
		if (BNXT_CHIP_SR2(bp))
			bp->flags |= BNXT_FLAG_CHIP_SR2;
	}

	rc = bnxt_alloc_rss_indir_tbl(bp);
	if (rc)
+25 −46
Original line number Diff line number Diff line
@@ -1142,50 +1142,6 @@ struct bnxt_ntuple_filter {
#define BNXT_FLTR_UPDATE	1
};

struct hwrm_port_phy_qcfg_output_compat {
	__le16	error_code;
	__le16	req_type;
	__le16	seq_id;
	__le16	resp_len;
	u8	link;
	u8	link_signal_mode;
	__le16	link_speed;
	u8	duplex_cfg;
	u8	pause;
	__le16	support_speeds;
	__le16	force_link_speed;
	u8	auto_mode;
	u8	auto_pause;
	__le16	auto_link_speed;
	__le16	auto_link_speed_mask;
	u8	wirespeed;
	u8	lpbk;
	u8	force_pause;
	u8	module_status;
	__le32	preemphasis;
	u8	phy_maj;
	u8	phy_min;
	u8	phy_bld;
	u8	phy_type;
	u8	media_type;
	u8	xcvr_pkg_type;
	u8	eee_config_phy_addr;
	u8	parallel_detect;
	__le16	link_partner_adv_speeds;
	u8	link_partner_adv_auto_mode;
	u8	link_partner_adv_pause;
	__le16	adv_eee_link_speed_mask;
	__le16	link_partner_adv_eee_link_speed_mask;
	__le32	xcvr_identifier_type_tx_lpi_timer;
	__le16	fec_cfg;
	u8	duplex_state;
	u8	option_flags;
	char	phy_vendor_name[16];
	char	phy_vendor_partnumber[16];
	u8	unused_0[7];
	u8	valid;
};

struct bnxt_link_info {
	u8			phy_type;
	u8			media_type;
@@ -1535,6 +1491,8 @@ struct bnxt {

	u8			chip_rev;

#define CHIP_NUM_58818		0xd818

#define BNXT_CHIP_NUM_5730X(chip_num)		\
	((chip_num) >= CHIP_NUM_57301 &&	\
	 (chip_num) <= CHIP_NUM_57304)
@@ -1613,6 +1571,7 @@ struct bnxt {
					 BNXT_FLAG_ROCEV2_CAP)
	#define BNXT_FLAG_NO_AGG_RINGS	0x20000
	#define BNXT_FLAG_RX_PAGE_MODE	0x40000
	#define BNXT_FLAG_CHIP_SR2	0x80000
	#define BNXT_FLAG_MULTI_HOST	0x100000
	#define BNXT_FLAG_DSN_VALID	0x200000
	#define BNXT_FLAG_DOUBLE_DB	0x400000
@@ -1638,12 +1597,18 @@ struct bnxt {
				 (!((bp)->flags & BNXT_FLAG_CHIP_P5) ||	\
				  (bp)->max_tpa_v2) && !is_kdump_kernel())

/* Chip class phase 5 */
#define BNXT_CHIP_P5(bp)			\
#define BNXT_CHIP_SR2(bp)			\
	((bp)->chip_num == CHIP_NUM_58818)

#define BNXT_CHIP_P5_THOR(bp)			\
	((bp)->chip_num == CHIP_NUM_57508 ||	\
	 (bp)->chip_num == CHIP_NUM_57504 ||	\
	 (bp)->chip_num == CHIP_NUM_57502)

/* Chip class phase 5 */
#define BNXT_CHIP_P5(bp)			\
	(BNXT_CHIP_P5_THOR(bp) || BNXT_CHIP_SR2(bp))

/* Chip class phase 4.x */
#define BNXT_CHIP_P4(bp)			\
	(BNXT_CHIP_NUM_57X1X((bp)->chip_num) ||	\
@@ -1935,6 +1900,20 @@ struct bnxt {
	struct device		*hwmon_dev;
};

#define BNXT_NUM_RX_RING_STATS			8
#define BNXT_NUM_TX_RING_STATS			8
#define BNXT_NUM_TPA_RING_STATS			4
#define BNXT_NUM_TPA_RING_STATS_P5		5
#define BNXT_NUM_TPA_RING_STATS_P5_SR2		6

#define BNXT_RING_STATS_SIZE_P5					\
	((BNXT_NUM_RX_RING_STATS + BNXT_NUM_TX_RING_STATS +	\
	  BNXT_NUM_TPA_RING_STATS_P5) * 8)

#define BNXT_RING_STATS_SIZE_P5_SR2				\
	((BNXT_NUM_RX_RING_STATS + BNXT_NUM_TX_RING_STATS +	\
	  BNXT_NUM_TPA_RING_STATS_P5_SR2) * 8)

#define BNXT_GET_RING_STATS64(sw, counter)		\
	(*((sw) + offsetof(struct ctx_hw_stats, counter) / 8))

+7 −3
Original line number Diff line number Diff line
@@ -172,6 +172,7 @@ static const char * const bnxt_ring_tpa2_stats_str[] = {
	"rx_tpa_pkt",
	"rx_tpa_bytes",
	"rx_tpa_errors",
	"rx_tpa_events",
};

static const char * const bnxt_rx_sw_stats_str[] = {
@@ -462,9 +463,12 @@ static const struct {
static int bnxt_get_num_tpa_ring_stats(struct bnxt *bp)
{
	if (BNXT_SUPPORTS_TPA(bp)) {
		if (bp->max_tpa_v2)
			return ARRAY_SIZE(bnxt_ring_tpa2_stats_str);
		return ARRAY_SIZE(bnxt_ring_tpa_stats_str);
		if (bp->max_tpa_v2) {
			if (BNXT_CHIP_P5_THOR(bp))
				return BNXT_NUM_TPA_RING_STATS_P5;
			return BNXT_NUM_TPA_RING_STATS_P5_SR2;
		}
		return BNXT_NUM_TPA_RING_STATS;
	}
	return 0;
}
+317 −58

File changed.

Preview size limit exceeded, changes collapsed.

+1 −1
Original line number Diff line number Diff line
@@ -1029,7 +1029,7 @@ static int bnxt_vf_set_link(struct bnxt *bp, struct bnxt_vf_info *vf)
		rc = bnxt_hwrm_exec_fwd_resp(
			bp, vf, sizeof(struct hwrm_port_phy_qcfg_input));
	} else {
		struct hwrm_port_phy_qcfg_output_compat phy_qcfg_resp = {0};
		struct hwrm_port_phy_qcfg_output phy_qcfg_resp = {0};
		struct hwrm_port_phy_qcfg_input *phy_qcfg_req;

		phy_qcfg_req =