Commit 9d65b1b4 authored by Shiwu Zhang's avatar Shiwu Zhang Committed by Alex Deucher
Browse files

drm/amdgpu: add the accelerator PCIe class



Add the accelerator PCIe class and match the
class in amdgpu for 0x1002 devices of that class.

From PCI spec:
"PCI Code and ID Assignment, r1.9, sec 1, 1.19"

Signed-off-by: default avatarShiwu Zhang <shiwu.zhang@amd.com>
Acked-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>  # pci_ids.h
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 11b92df8
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+1 −1
Original line number Diff line number Diff line
@@ -2044,7 +2044,7 @@ static const struct pci_device_id pciidlist[] = {
	  .driver_data = CHIP_IP_DISCOVERY },

	{ PCI_DEVICE(0x1002, PCI_ANY_ID),
	  .class = AMD_ACCELERATOR_PROCESSING << 8,
	  .class = PCI_CLASS_ACCELERATOR_PROCESSING << 8,
	  .class_mask = 0xffffff,
	  .driver_data = CHIP_IP_DISCOVERY },

+1 −1
Original line number Diff line number Diff line
@@ -57,7 +57,7 @@ void amdgpu_virt_init_setting(struct amdgpu_device *adev)
	/* enable virtual display */
	if (adev->asic_type != CHIP_ALDEBARAN &&
	    adev->asic_type != CHIP_ARCTURUS &&
	    ((adev->pdev->class >> 8) != AMD_ACCELERATOR_PROCESSING)) {
	    ((adev->pdev->class >> 8) != PCI_CLASS_ACCELERATOR_PROCESSING)) {
		if (adev->mode_info.num_crtc == 0)
			adev->mode_info.num_crtc = 1;
		adev->enable_virtual_display = true;
+0 −1
Original line number Diff line number Diff line
@@ -27,7 +27,6 @@


#define AMD_MAX_USEC_TIMEOUT		1000000  /* 1000 ms */
#define AMD_ACCELERATOR_PROCESSING	0x1200   /* hardcoded pci class */

/*
 * Chip flags
+3 −0
Original line number Diff line number Diff line
@@ -151,6 +151,9 @@
#define PCI_CLASS_SP_DPIO		0x1100
#define PCI_CLASS_SP_OTHER		0x1180

#define PCI_BASE_CLASS_ACCELERATOR	0x12
#define PCI_CLASS_ACCELERATOR_PROCESSING	0x1200

#define PCI_CLASS_OTHERS		0xff

/* Vendors and devices.  Sort key: vendor first, device next. */