Commit 9cda93cb authored by Xingui Yang's avatar Xingui Yang Committed by Slim6882
Browse files

[Backport]scsi: hisi_sas: Update disk locked timeout to 7 seconds 

mainline inclusion
from mainline-v6.12-rc1
commit 9f564f15f88490b484e02442dc4c4b11640ea172
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/IBCN9K
CVE: NA
Reference: https://lore.kernel.org/r/20241008021822.2617339-10-liyihang9@huawei.com



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The SATA disk will be locked after the disk sends the DMA Setup frame
until all data frame transmission is completed. The
CFG_ICT_TIMER_STEP_TRSH register is used for sata disk to configure the
step size of the timer which records the time when the disk is
locked. The unit is 1us and the default step size is 150ms. If the disk
is locked for more than 7 timer steps, the io to be sent to the disk
will end abnormally.

The current timeout is only about 1 second, it is easy to trigger IO
abnormal end when the SATA hard disk returns data slowly. Adjust the
timeout to 7 seconds based on ERC time of most disks.

Signed-off-by: default avatarXingui Yang <yangxingui@huawei.com>
Link: https://lore.kernel.org/r/20241008021822.2617339-10-liyihang9@huawei.com


Reviewed-by: default avatarXiang Chen <chenxiang66@hisilicon.com>
Reviewed-by: default avatarYihang Li <liyihang9@huawei.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: default avatarSlim6882 <yangjunshuo@huawei.com>
parent f605baa3

drivers/scsi/hisi_sas/hisi_sas_v3_hw.c

+2 −0
Original line number Diff line number Diff line
@@ -42,6 +42,7 @@ 
#define CQ_INT_CONVERGE_EN		0xb0

#define CFG_AGING_TIME			0xbc

#define HGC_DFX_CFG2			0xc0

#define CFG_ICT_TIMER_STEP_TRSH		0xc8

#define CFG_ABT_SET_QUERY_IPTT	0xd4

#define CFG_SET_ABORTED_IPTT_OFF	0

#define CFG_SET_ABORTED_IPTT_MSK	(0xfff << CFG_SET_ABORTED_IPTT_OFF)
@@ -630,6 +631,7 @@ static void init_reg_v3_hw(struct hisi_hba *hisi_hba) 
	hisi_sas_write32(hisi_hba, TRANS_LOCK_ICT_TIME, 0x4A817C80);

	hisi_sas_write32(hisi_hba, HGC_SAS_TXFAIL_RETRY_CTRL, 0x108);

	hisi_sas_write32(hisi_hba, CFG_AGING_TIME, 0x1);

	hisi_sas_write32(hisi_hba, CFG_ICT_TIMER_STEP_TRSH, 0xf4240);

	hisi_sas_write32(hisi_hba, INT_COAL_EN, 0x3);

	hisi_sas_write32(hisi_hba, OQ_INT_COAL_TIME, 0xa);

	hisi_sas_write32(hisi_hba, OQ_INT_COAL_CNT, 0xa);