Commit 9cbe605b authored by Adam Ford's avatar Adam Ford Committed by Shawn Guo
Browse files

arm64: dts: imx8mm: Enable Hantro G1 and G2 video decoders 



There are two decoders on the i.MX8M Mini controlled by the
vpu-blk-ctrl.  The G1 supports H264 and VP8 while the
G2 support HEVC and VP9.

Signed-off-by: default avatarAdam Ford <aford173@gmail.com>
Reviewed-by: default avatarEzequiel Garcia <ezequiel@vanguardiasur.com.ar>
Reviewed-by: default avatarLucas Stach <l.stach@pengutronix.de>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 4ac7e4a8

arch/arm64/boot/dts/freescale/imx8mm.dtsi

+22 −0
Original line number Diff line number Diff line
@@ -1317,6 +1317,22 @@ 
			power-domains = <&pgc_gpu>;

		};



		vpu_g1: video-codec@38300000 {

			compatible = "nxp,imx8mm-vpu-g1";

			reg = <0x38300000 0x10000>;

			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk IMX8MM_CLK_VPU_G1_ROOT>;

			power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G1>;

		};



		vpu_g2: video-codec@38310000 {

			compatible = "nxp,imx8mq-vpu-g2";

			reg = <0x38310000 0x10000>;

			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk IMX8MM_CLK_VPU_G2_ROOT>;

			power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G2>;

		};



		vpu_blk_ctrl: blk-ctrl@38330000 {

			compatible = "fsl,imx8mm-vpu-blk-ctrl", "syscon";

			reg = <0x38330000 0x100>;
@@ -1327,6 +1343,12 @@ 
				 <&clk IMX8MM_CLK_VPU_G2_ROOT>,

				 <&clk IMX8MM_CLK_VPU_H1_ROOT>;

			clock-names = "g1", "g2", "h1";

			assigned-clocks = <&clk IMX8MM_CLK_VPU_G1>,

					  <&clk IMX8MM_CLK_VPU_G2>;

			assigned-clock-parents = <&clk IMX8MM_VPU_PLL_OUT>,

						 <&clk IMX8MM_VPU_PLL_OUT>;

			assigned-clock-rates = <600000000>,

					       <600000000>;

			#power-domain-cells = <1>;

		};