Unverified Commit 9cb2bad7 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
Browse files

!12036 KVM: arm64: Add new HiSi CPU type for supporting DVMBM 

Merge Pull Request from: @ci-robot 
 
PR sync from: Zhou Wang <wangzhou1@hisilicon.com>
https://mailweb.openeuler.org/hyperkitty/list/kernel@openeuler.org/message/TKCXPGCSXYMXSJVMSYMDBRTFETHZSFSG/ 
 
https://gitee.com/openeuler/kernel/issues/IAV9YO 
 
Link:https://gitee.com/openeuler/kernel/pulls/12036

 

Reviewed-by: default avatarZenghui Yu <yuzenghui@huawei.com>
Signed-off-by: default avatarZhang Peng <zhangpeng362@huawei.com>
parents 30113d28 0fb85a61

arch/arm64/kvm/hisilicon/hisi_virt.c

+10 −6
Original line number Diff line number Diff line
@@ -18,6 +18,8 @@ static const char * const hisi_cpu_type_str[] = { 
	"Hisi1616",

	"Hisi1620",

	"HIP09",

	"HIP10",

	"HIP10C",

	"Unknown"

};
@@ -26,7 +28,9 @@ static const char * const oem_str[] = { 
	"HIP06   ",	/* Hisi 1612 */

	"HIP07   ",	/* Hisi 1616 */

	"HIP08   ",	/* Hisi 1620 */

	"HIP09"		/* HIP09 */

	"HIP09   ",	/* HIP09 */

	"HIP10   ",	/* HIP10 */

	"HIP10C  "	/* HIP10C */

};



/*
@@ -47,7 +51,7 @@ static enum hisi_cpu_type acpi_get_hisi_cpu_type(void) 
	}



	for (i = 0; i < str_size; ++i) {

		if (!strncmp(oem_str[i], table->oem_table_id, 5))

		if (!strncmp(oem_str[i], table->oem_table_id, 8))

			return i;

	}
@@ -153,7 +157,7 @@ static void hardware_disable_dvmbm(void *data) 


bool hisi_dvmbm_supported(void)

{

	if (cpu_type != HI_IP09)

	if (cpu_type != HI_IP10 && cpu_type != HI_IP10C)

		return false;



	/* Determine whether DVMBM is supported by the hardware */

arch/arm64/kvm/hisilicon/hisi_virt.h

+4 −2
Original line number Diff line number Diff line
@@ -12,10 +12,12 @@ enum hisi_cpu_type { 
	HI_1616,

	HI_1620,

	HI_IP09,

	HI_IP10,

	HI_IP10C,

	UNKNOWN_HI_TYPE

};



/* HIP09 */

/* HIP10 */

#define AIDR_EL1_DVMBM_MASK	GENMASK_ULL(13, 12)

#define SYS_LSUDVM_CTRL_EL2	sys_reg(3, 4, 15, 7, 4)

#define LSUDVM_CTLR_EL2_MASK	BIT_ULL(0)
@@ -36,7 +38,7 @@ enum hisi_cpu_type { 
#define TOTEM_B_ID 3



/*

 * MPIDR_EL1 layout on HIP09

 * MPIDR_EL1 layout on HIP10

 *

 * Aff3[7:3]	- socket ID	[0-15]

 * Aff3[2:0]	- die ID	[1,3]