Commit 9c6e72fb authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: add missing cache properties 



Add required cache-level and cache-unified properties to fix warnings
like:

  qdu1000-idp.dtb: l3-cache: 'cache-unified' is a required property
  qdu1000-idp.dtb: l2-cache: 'cache-level' is a required property

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230416101134.95686-3-krzysztof.kozlowski@linaro.org
parent 08465709

arch/arm64/boot/dts/qcom/ipq5332.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -73,6 +73,7 @@ 
		L2_0: l2-cache {

			compatible = "cache";

			cache-level = <2>;

			cache-unified;

		};

	};

arch/arm64/boot/dts/qcom/ipq6018.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -84,6 +84,7 @@ 
		L2_0: l2-cache {

			compatible = "cache";

			cache-level = <2>;

			cache-unified;

		};

	};

arch/arm64/boot/dts/qcom/ipq8074.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -67,6 +67,7 @@ 
		L2_0: l2-cache {

			compatible = "cache";

			cache-level = <2>;

			cache-unified;

		};

	};

arch/arm64/boot/dts/qcom/ipq9574.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -72,6 +72,7 @@ 
		L2_0: l2-cache {

			compatible = "cache";

			cache-level = <2>;

			cache-unified;

		};

	};

arch/arm64/boot/dts/qcom/msm8916.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -180,6 +180,7 @@ 
		L2_0: l2-cache {

			compatible = "cache";

			cache-level = <2>;

			cache-unified;

		};



		idle-states {