Unverified Commit 9c63b846 authored by Mark Brown's avatar Mark Brown
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spi: spi-mem: Convert Aspeed SMC driver to spi-mem 

Merge series from Cédric Le Goater <clg@kaod.org>:

This series adds a new SPI driver using the spi-mem interface for the
Aspeed static memory controllers of the AST2600, AST2500 and AST2400
SoCs.

 * AST2600 Firmware SPI Memory Controller (FMC)
 * AST2600 SPI Flash Controller (SPI1 and SPI2)
 * AST2500 Firmware SPI Memory Controller (FMC)
 * AST2500 SPI Flash Controller (SPI1 and SPI2)
 * AST2400 New Static Memory Controller (also referred as FMC)
 * AST2400 SPI Flash Controller (SPI)

It is based on the current OpenBMC kernel driver [1], using directly
the MTD SPI-NOR interface and on a patchset [2] previously proposed
adding support for the AST2600 only. This driver takes a slightly
different approach to cover all 6 controllers.

It does not make use of the controller register disabling Address and
Data byte lanes because is not available on the AST2400 SoC. We could
introduce a specific handler for new features available on recent SoCs
if needed. As there is not much difference on performance, the driver
chooses the common denominator: "User mode" which has been heavily
tested in [1]. "User mode" is also used as a fall back method when
flash device mapping window is too small.

Problems to address with spi-mem were the configuration of the mapping
windows and the calibration of the read timings. The driver handles
them in the direct mapping handler when some knowledge on the size of
the flash device is know. It is not perfect but not incorrect either.
The algorithm is one from [1] because it doesn't require the DMA
registers which are not available on all controllers.

Direct mapping for writes is not supported (yet). I have seen some
corruption with writes and I preferred to use the safer and proven
method of the initial driver [1]. We can improve that later.

The driver supports Quad SPI RX transfers on the AST2600 SoC but it
didn't have the expected results. Therefore it is not activated yet.
There are some issues on the pinctrl to investigate first.

Tested on:

 * OpenPOWER Palmetto (AST2400)
 * Facebook Wedge 100 BMC (AST2400) by Tao Ren <rentao.bupt@gmail.com>
 * Evaluation board (AST2500)
 * Inspur FP5280G2 BMC (AST2500) by John Wang <wangzq.jn@gmail.com>
 * Facebook Backpack CMM BMC (AST2500) by Tao Ren <rentao.bupt@gmail.com>
 * OpenPOWER Witherspoon (AST2500)
 * Evaluation board (AST2600 A0 and A3)
 * Rainier board (AST2600)

[1] https://github.com/openbmc/linux/blob/dev-5.15/drivers/mtd/spi-nor/controllers/aspeed-smc.c
[2] https://patchwork.ozlabs.org/project/linux-aspeed/list/?series=212394
parents b1849f50 73ae97e3

Documentation/devicetree/bindings/mtd/aspeed-smc.txt

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* Aspeed Firmware Memory controller

* Aspeed SPI Flash Memory Controller



The Firmware Memory Controller in the Aspeed AST2500 SoC supports

three chip selects, two of which are always of SPI type and the third

can be SPI or NOR type flash. These bindings only describe SPI.



The two SPI flash memory controllers in the AST2500 each support two

chip selects.



Required properties:

  - compatible : Should be one of

	"aspeed,ast2400-fmc" for the AST2400 Firmware Memory Controller

	"aspeed,ast2400-spi" for the AST2400 SPI Flash memory Controller

	"aspeed,ast2500-fmc" for the AST2500 Firmware Memory Controller

	"aspeed,ast2500-spi" for the AST2500 SPI flash memory controllers



  - reg : the first contains the control register location and length,

          the second contains the memory window mapping address and length

  - #address-cells : must be 1 corresponding to chip select child binding

  - #size-cells : must be 0 corresponding to chip select child binding



Optional properties:

  - interrupts : Should contain the interrupt for the dma device if an

    FMC



The child nodes are the SPI flash modules which must have a compatible

property as specified in bindings/mtd/jedec,spi-nor.txt



Optionally, the child node can contain properties for SPI mode (may be

ignored):

  - spi-max-frequency - max frequency of spi bus





Example:

fmc: fmc@1e620000 {

	compatible = "aspeed,ast2500-fmc";

	reg = < 0x1e620000 0x94

		0x20000000 0x02000000 >;

	#address-cells = <1>;

	#size-cells = <0>;

	interrupts = <19>;

	flash@0 {

		reg = < 0 >;

		compatible = "jedec,spi-nor";

		/* spi-max-frequency = <>; */

		/* m25p,fast-read; */

		#address-cells = <1>;

		#size-cells = <1>;

	};

};

Documentation/devicetree/bindings/spi/aspeed,ast2600-fmc.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/spi/aspeed,ast2600-fmc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Aspeed SMC controllers bindings



maintainers:

  - Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>

  - Cédric Le Goater <clg@kaod.org>



description: |

  This binding describes the Aspeed Static Memory Controllers (FMC and

  SPI) of the AST2400, AST2500 and AST2600 SOCs.



allOf:

  - $ref: "spi-controller.yaml#"



properties:

  compatible:

    enum:

      - aspeed,ast2600-fmc

      - aspeed,ast2600-spi

      - aspeed,ast2500-fmc

      - aspeed,ast2500-spi

      - aspeed,ast2400-fmc

      - aspeed,ast2400-spi



  reg:

    items:

      - description: registers

      - description: memory mapping



  clocks:

    maxItems: 1



  interrupts:

    maxItems: 1



required:

  - compatible

  - reg

  - clocks



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>

    #include <dt-bindings/clock/ast2600-clock.h>



    spi@1e620000 {

        reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>;

        #address-cells = <1>;

        #size-cells = <0>;

        compatible = "aspeed,ast2600-fmc";

        clocks = <&syscon ASPEED_CLK_AHB>;

        interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;



        flash@0 {

                reg = < 0 >;

                compatible = "jedec,spi-nor";

                spi-max-frequency = <50000000>;

                spi-rx-bus-width = <2>;

        };



        flash@1 {

                reg = < 1 >;

                compatible = "jedec,spi-nor";

                spi-max-frequency = <50000000>;

                spi-rx-bus-width = <2>;

        };



        flash@2 {

                reg = < 2 >;

                compatible = "jedec,spi-nor";

                spi-max-frequency = <50000000>;

                spi-rx-bus-width = <2>;

        };

    };

MAINTAINERS

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@@ -3099,6 +3099,16 @@ S: Maintained 
F:	Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml

F:	drivers/mmc/host/sdhci-of-aspeed*









ASPEED SMC SPI DRIVER









M:	Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>









M:	Cédric Le Goater <clg@kaod.org>









L:	linux-aspeed@lists.ozlabs.org (moderated for non-subscribers)









L:	openbmc@lists.ozlabs.org (moderated for non-subscribers)









L:	linux-spi@vger.kernel.org









S:	Maintained









F:	Documentation/devicetree/bindings/spi/aspeed,ast2600-fmc.yaml









F:	drivers/spi/spi-aspeed-smc.c

















ASPEED VIDEO ENGINE DRIVER









M:	Eddie James <eajames@linux.ibm.com>









L:	linux-media@vger.kernel.org
































drivers/mtd/spi-nor/controllers/Kconfig



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# SPDX-License-Identifier: GPL-2.0-only









config SPI_ASPEED_SMC









	tristate "Aspeed flash controllers in SPI mode"









	depends on ARCH_ASPEED || COMPILE_TEST









	depends on HAS_IOMEM && OF









	help









	  This enables support for the Firmware Memory controller (FMC)









	  in the Aspeed AST2500/AST2400 SoCs when attached to SPI NOR chips,









	  and support for the SPI flash memory controller (SPI) for









	  the host firmware. The implementation only supports SPI NOR.



















config SPI_HISI_SFC









	tristate "Hisilicon FMC SPI NOR Flash Controller(SFC)"









	depends on ARCH_HISI || COMPILE_TEST
































drivers/mtd/spi-nor/controllers/Makefile



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# SPDX-License-Identifier: GPL-2.0









obj-$(CONFIG_SPI_ASPEED_SMC)	+= aspeed-smc.o









obj-$(CONFIG_SPI_HISI_SFC)	+= hisi-sfc.o









obj-$(CONFIG_SPI_NXP_SPIFI)	+= nxp-spifi.o