Loading arch/arm/kernel/entry-header.S +0 −18 Original line number Diff line number Diff line Loading @@ -37,24 +37,6 @@ #endif .endm #if __LINUX_ARM_ARCH__ >= 6 .macro disable_irq cpsid i .endm .macro enable_irq cpsie i .endm #else .macro disable_irq msr cpsr_c, #PSR_I_BIT | SVC_MODE .endm .macro enable_irq msr cpsr_c, #SVC_MODE .endm #endif .macro get_thread_info, rd mov \rd, sp, lsr #13 mov \rd, \rd, lsl #13 Loading arch/arm/vfp/entry.S +1 −0 Original line number Diff line number Diff line Loading @@ -18,6 +18,7 @@ #include <linux/linkage.h> #include <linux/init.h> #include <asm/asm-offsets.h> #include <asm/assembler.h> #include <asm/vfpmacros.h> .globl do_vfp Loading include/asm-arm/assembler.h +22 −5 Original line number Diff line number Diff line Loading @@ -80,16 +80,33 @@ instr regs /* * Save the current IRQ state and disable IRQs. Note that this macro * assumes FIQs are enabled, and that the processor is in SVC mode. * Enable and disable interrupts */ .macro save_and_disable_irqs, oldcpsr mrs \oldcpsr, cpsr #if __LINUX_ARM_ARCH__ >= 6 .macro disable_irq cpsid i .endm .macro enable_irq cpsie i .endm #else msr cpsr_c, #PSR_I_BIT | MODE_SVC .macro disable_irq msr cpsr_c, #PSR_I_BIT | SVC_MODE .endm .macro enable_irq msr cpsr_c, #SVC_MODE .endm #endif /* * Save the current IRQ state and disable IRQs. Note that this macro * assumes FIQs are enabled, and that the processor is in SVC mode. */ .macro save_and_disable_irqs, oldcpsr mrs \oldcpsr, cpsr disable_irq .endm /* Loading Loading
arch/arm/kernel/entry-header.S +0 −18 Original line number Diff line number Diff line Loading @@ -37,24 +37,6 @@ #endif .endm #if __LINUX_ARM_ARCH__ >= 6 .macro disable_irq cpsid i .endm .macro enable_irq cpsie i .endm #else .macro disable_irq msr cpsr_c, #PSR_I_BIT | SVC_MODE .endm .macro enable_irq msr cpsr_c, #SVC_MODE .endm #endif .macro get_thread_info, rd mov \rd, sp, lsr #13 mov \rd, \rd, lsl #13 Loading
arch/arm/vfp/entry.S +1 −0 Original line number Diff line number Diff line Loading @@ -18,6 +18,7 @@ #include <linux/linkage.h> #include <linux/init.h> #include <asm/asm-offsets.h> #include <asm/assembler.h> #include <asm/vfpmacros.h> .globl do_vfp Loading
include/asm-arm/assembler.h +22 −5 Original line number Diff line number Diff line Loading @@ -80,16 +80,33 @@ instr regs /* * Save the current IRQ state and disable IRQs. Note that this macro * assumes FIQs are enabled, and that the processor is in SVC mode. * Enable and disable interrupts */ .macro save_and_disable_irqs, oldcpsr mrs \oldcpsr, cpsr #if __LINUX_ARM_ARCH__ >= 6 .macro disable_irq cpsid i .endm .macro enable_irq cpsie i .endm #else msr cpsr_c, #PSR_I_BIT | MODE_SVC .macro disable_irq msr cpsr_c, #PSR_I_BIT | SVC_MODE .endm .macro enable_irq msr cpsr_c, #SVC_MODE .endm #endif /* * Save the current IRQ state and disable IRQs. Note that this macro * assumes FIQs are enabled, and that the processor is in SVC mode. */ .macro save_and_disable_irqs, oldcpsr mrs \oldcpsr, cpsr disable_irq .endm /* Loading