Commit 9c401864 authored by Hayes Wang's avatar Hayes Wang Committed by David S. Miller
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r8169: change the L0/L1 entrance latencies for RTL8106e



The original L0 and L1 entrance latencies of RTL8106e are 4us. And
they cause the delay of link-up interrupt when enabling ASPM. Change
the L0 entrance latency to 7us and L1 entrance latency to 32us. Then,
they could avoid the issue.

Tested-by: default avatarKoba Ko <koba.ko@canonical.com>
Signed-off-by: default avatarHayes Wang <hayeswang@realtek.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 2115d3d4
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+3 −0
Original line number Diff line number Diff line
@@ -3502,6 +3502,9 @@ static void rtl_hw_start_8106(struct rtl8169_private *tp)
	RTL_W8(tp, MCU, RTL_R8(tp, MCU) | EN_NDP | EN_OOB_RESET);
	RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) & ~PFM_EN);

	/* The default value is 0x13. Change it to 0x2f */
	rtl_csi_access_enable(tp, 0x2f);

	rtl_eri_write(tp, 0x1d0, ERIAR_MASK_0011, 0x0000);

	/* disable EEE */