Commit 9c1587d9 authored by Rui Miguel Silva's avatar Rui Miguel Silva Committed by Greg Kroah-Hartman
Browse files

usb: isp1760: otg control register access



The set/clear of the otg control values is done writing to
two different 16bit registers, however we setup the regmap
width for isp1760/61 to 32bit value bits.

So, just access the clear register address (0x376)as the high
part of the otg control register set (0x374), and write the
values in one go to make sure they get clear/set.

Reported-by: default avatarDietmar Eggemann <dietmar.eggemann@arm.com>
Tested-by: default avatarDietmar Eggemann <dietmar.eggemann@arm.com>
Signed-off-by: default avatarRui Miguel Silva <rui.silva@linaro.org>
Link: https://lore.kernel.org/r/20210827131154.4151862-6-rui.silva@linaro.org


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 955d0fb5
Loading
Loading
Loading
Loading
+26 −24
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ static int isp1760_init_core(struct isp1760_device *isp)
{
	struct isp1760_hcd *hcd = &isp->hcd;
	struct isp1760_udc *udc = &isp->udc;
	u32 otg_ctrl;

	/* Low-level chip reset */
	if (isp->rst_gpio) {
@@ -83,16 +84,17 @@ static int isp1760_init_core(struct isp1760_device *isp)
	 *
	 * TODO: Really support OTG. For now we configure port 1 in device mode
	 */
	if (((isp->devflags & ISP1760_FLAG_ISP1761) ||
	     (isp->devflags & ISP1760_FLAG_ISP1763)) &&
	    (isp->devflags & ISP1760_FLAG_PERIPHERAL_EN)) {
		isp1760_field_set(hcd->fields, HW_DM_PULLDOWN);
		isp1760_field_set(hcd->fields, HW_DP_PULLDOWN);
		isp1760_field_set(hcd->fields, HW_OTG_DISABLE);
	if (isp->devflags & ISP1760_FLAG_ISP1761) {
		if (isp->devflags & ISP1760_FLAG_PERIPHERAL_EN) {
			otg_ctrl = (ISP176x_HW_DM_PULLDOWN_CLEAR |
				    ISP176x_HW_DP_PULLDOWN_CLEAR |
				    ISP176x_HW_OTG_DISABLE);
		} else {
		isp1760_field_set(hcd->fields, HW_SW_SEL_HC_DC);
		isp1760_field_set(hcd->fields, HW_VBUS_DRV);
		isp1760_field_set(hcd->fields, HW_SEL_CP_EXT);
			otg_ctrl = (ISP176x_HW_SW_SEL_HC_DC_CLEAR |
				    ISP176x_HW_VBUS_DRV |
				    ISP176x_HW_SEL_CP_EXT);
		}
		isp1760_reg_write(hcd->regs, ISP176x_HC_OTG_CTRL, otg_ctrl);
	}

	dev_info(isp->dev, "%s bus width: %u, oc: %s\n",
@@ -235,20 +237,20 @@ static const struct reg_field isp1760_hc_reg_fields[] = {
	[HC_ISO_IRQ_MASK_AND]	= REG_FIELD(ISP176x_HC_ISO_IRQ_MASK_AND, 0, 31),
	[HC_INT_IRQ_MASK_AND]	= REG_FIELD(ISP176x_HC_INT_IRQ_MASK_AND, 0, 31),
	[HC_ATL_IRQ_MASK_AND]	= REG_FIELD(ISP176x_HC_ATL_IRQ_MASK_AND, 0, 31),
	[HW_OTG_DISABLE]	= REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 10, 10),
	[HW_SW_SEL_HC_DC]	= REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 7, 7),
	[HW_VBUS_DRV]		= REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 4, 4),
	[HW_SEL_CP_EXT]		= REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 3, 3),
	[HW_DM_PULLDOWN]	= REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 2, 2),
	[HW_DP_PULLDOWN]	= REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 1, 1),
	[HW_DP_PULLUP]		= REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 0, 0),
	[HW_OTG_DISABLE_CLEAR]	= REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 10, 10),
	[HW_SW_SEL_HC_DC_CLEAR]	= REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 7, 7),
	[HW_VBUS_DRV_CLEAR]	= REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 4, 4),
	[HW_SEL_CP_EXT_CLEAR]	= REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 3, 3),
	[HW_DM_PULLDOWN_CLEAR]	= REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 2, 2),
	[HW_DP_PULLDOWN_CLEAR]	= REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 1, 1),
	[HW_DP_PULLUP_CLEAR]	= REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 0, 0),
	[HW_OTG_DISABLE_CLEAR]	= REG_FIELD(ISP176x_HC_OTG_CTRL, 26, 26),
	[HW_SW_SEL_HC_DC_CLEAR]	= REG_FIELD(ISP176x_HC_OTG_CTRL, 23, 23),
	[HW_VBUS_DRV_CLEAR]	= REG_FIELD(ISP176x_HC_OTG_CTRL, 20, 20),
	[HW_SEL_CP_EXT_CLEAR]	= REG_FIELD(ISP176x_HC_OTG_CTRL, 19, 19),
	[HW_DM_PULLDOWN_CLEAR]	= REG_FIELD(ISP176x_HC_OTG_CTRL, 18, 18),
	[HW_DP_PULLDOWN_CLEAR]	= REG_FIELD(ISP176x_HC_OTG_CTRL, 17, 17),
	[HW_DP_PULLUP_CLEAR]	= REG_FIELD(ISP176x_HC_OTG_CTRL, 16, 16),
	[HW_OTG_DISABLE]	= REG_FIELD(ISP176x_HC_OTG_CTRL, 10, 10),
	[HW_SW_SEL_HC_DC]	= REG_FIELD(ISP176x_HC_OTG_CTRL, 7, 7),
	[HW_VBUS_DRV]		= REG_FIELD(ISP176x_HC_OTG_CTRL, 4, 4),
	[HW_SEL_CP_EXT]		= REG_FIELD(ISP176x_HC_OTG_CTRL, 3, 3),
	[HW_DM_PULLDOWN]	= REG_FIELD(ISP176x_HC_OTG_CTRL, 2, 2),
	[HW_DP_PULLDOWN]	= REG_FIELD(ISP176x_HC_OTG_CTRL, 1, 1),
	[HW_DP_PULLUP]		= REG_FIELD(ISP176x_HC_OTG_CTRL, 0, 0),
};

static const struct reg_field isp1763_hc_reg_fields[] = {
+16 −0
Original line number Diff line number Diff line
@@ -61,6 +61,7 @@
#define ISP176x_HC_INT_IRQ_MASK_AND	0x328
#define ISP176x_HC_ATL_IRQ_MASK_AND	0x32c

#define ISP176x_HC_OTG_CTRL		0x374
#define ISP176x_HC_OTG_CTRL_SET		0x374
#define ISP176x_HC_OTG_CTRL_CLEAR	0x376

@@ -179,6 +180,21 @@ enum isp176x_host_controller_fields {
#define ISP176x_DC_IESUSP		BIT(3)
#define ISP176x_DC_IEBRST		BIT(0)

#define ISP176x_HW_OTG_DISABLE_CLEAR	BIT(26)
#define ISP176x_HW_SW_SEL_HC_DC_CLEAR	BIT(23)
#define ISP176x_HW_VBUS_DRV_CLEAR	BIT(20)
#define ISP176x_HW_SEL_CP_EXT_CLEAR	BIT(19)
#define ISP176x_HW_DM_PULLDOWN_CLEAR	BIT(18)
#define ISP176x_HW_DP_PULLDOWN_CLEAR	BIT(17)
#define ISP176x_HW_DP_PULLUP_CLEAR	BIT(16)
#define ISP176x_HW_OTG_DISABLE		BIT(10)
#define ISP176x_HW_SW_SEL_HC_DC		BIT(7)
#define ISP176x_HW_VBUS_DRV		BIT(4)
#define ISP176x_HW_SEL_CP_EXT		BIT(3)
#define ISP176x_HW_DM_PULLDOWN		BIT(2)
#define ISP176x_HW_DP_PULLDOWN		BIT(1)
#define ISP176x_HW_DP_PULLUP		BIT(0)

#define ISP176x_DC_ENDPTYP_ISOC		0x01
#define ISP176x_DC_ENDPTYP_BULK		0x02
#define ISP176x_DC_ENDPTYP_INTERRUPT	0x03