Commit 9c02aa24 authored by Abel Vesa's avatar Abel Vesa Committed by Martin K. Petersen
Browse files

scsi: ufs: ufs-qcom: Clear qunipro_g4_sel for HW version major 5 



On SM8550, depending on the Qunipro, we can run with G5 or G4.  For now,
when the major version is 5 or above, we go with G5.  Therefore, we need to
specifically tell UFS HC that.

Signed-off-by: default avatarAbel Vesa <abel.vesa@linaro.org>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 49f262bc

drivers/ufs/host/ufs-qcom.c

+6 −2
Original line number Diff line number Diff line
@@ -224,6 +224,10 @@ static void ufs_qcom_select_unipro_mode(struct ufs_qcom_host *host) 
	ufshcd_rmwl(host->hba, QUNIPRO_SEL,

		   ufs_qcom_cap_qunipro(host) ? QUNIPRO_SEL : 0,

		   REG_UFS_CFG1);



	if (host->hw_ver.major == 0x05)

		ufshcd_rmwl(host->hba, QUNIPRO_G4_SEL, 0, REG_UFS_CFG0);



	/* make sure above configuration is applied before we return */

	mb();

}
@@ -513,9 +517,9 @@ static int ufs_qcom_cfg_timers(struct ufs_hba *hba, u32 gear, 
		mb();

	}



	if (update_link_startup_timer) {

	if (update_link_startup_timer && host->hw_ver.major != 0x5) {

		ufshcd_writel(hba, ((core_clk_rate / MSEC_PER_SEC) * 100),

			      REG_UFS_PA_LINK_STARTUP_TIMER);

			      REG_UFS_CFG0);

		/*

		 * make sure that this configuration is applied before

		 * we return

drivers/ufs/host/ufs-qcom.h

+5 −1
Original line number Diff line number Diff line
@@ -36,7 +36,8 @@ enum { 
	REG_UFS_PA_ERR_CODE                 = 0xCC,

	/* On older UFS revisions, this register is called "RETRY_TIMER_REG" */

	REG_UFS_PARAM0                      = 0xD0,

	REG_UFS_PA_LINK_STARTUP_TIMER       = 0xD8,

	/* On older UFS revisions, this register is called "REG_UFS_PA_LINK_STARTUP_TIMER" */

	REG_UFS_CFG0                        = 0xD8,

	REG_UFS_CFG1                        = 0xDC,

	REG_UFS_CFG2                        = 0xE0,

	REG_UFS_HW_VERSION                  = 0xE4,
@@ -80,6 +81,9 @@ enum { 
#define UFS_CNTLR_2_x_x_VEN_REGS_OFFSET(x)	(0x000 + x)

#define UFS_CNTLR_3_x_x_VEN_REGS_OFFSET(x)	(0x400 + x)



/* bit definitions for REG_UFS_CFG0 register */

#define QUNIPRO_G4_SEL		BIT(5)



/* bit definitions for REG_UFS_CFG1 register */

#define QUNIPRO_SEL		BIT(0)

#define UFS_PHY_SOFT_RESET	BIT(1)