Commit 9bff6684 authored by David S. Miller's avatar David S. Miller
Browse files

Merge tag 'mlx5-updates-2021-07-24' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux 



mlx5-updates-2021-07-24

This series aims to reduce coupling in mlx5e, particularly between RX
resources (TIRs, RQTs) and numerous code units that use them.

This refactoring is required for upcoming features, ADQ and TX lag
hashing.

The issue with the current code is that TIRs and RQTs are unmanaged,
different places all over the driver create, destroy, track and
configure them, often in an uncoordinated way. The responsibilities of
different units become vague, leading to a lot of hidden dependencies
between numerous units and tight coupling between them, which is prone
to bugs and hard to maintain.

The result of this refactoring is:

1. Creating a manager for RX resources, that controls their lifecycle
and provides a clear API, which restricts the set of actions that other
units can do.

2. Using object-oriented approach for TIRs, RQTs and RX resource
manager (struct mlx5e_rx_res).

3. Fixing a few bugs and misbehaviors found during the refactoring.

4. Reducing the amount of dependencies, removing hidden dependencies,
making them one-directional and organizing the code in clear abstraction
layers.

5. Explicitly exposing the remaining weird dependencies.

6. Simplifying and organizing code that creates and modifies TIRs and
RQTs.

Saeed Mahameed says:

====================
mlx5 updates 2021-07-24

This series provides some refactoring to mlx5e RX resource management,
it is required for upcoming ADQ and TX lag hashing features.

The first two patches in this series :
  net/mlx5e: Prohibit inner indir TIRs in IPoIB
  net/mlx5e: Block LRO if firmware asks for tunneled LRO
Were supposed to go to net, but due to dependency and timing they were
included here.
I would appreciate it if you'd apply them to net and mark for -stable.

For more information please see tag log below.

Please pull and let me know if there is any problem.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents d20e5880 09f83569

drivers/net/ethernet/mellanox/mlx5/core/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -27,7 +27,8 @@ mlx5_core-$(CONFIG_MLX5_CORE_EN) += en_main.o en_common.o en_fs.o en_ethtool.o \ 
		en_selftest.o en/port.o en/monitor_stats.o en/health.o \

		en/reporter_tx.o en/reporter_rx.o en/params.o en/xsk/pool.o \

		en/xsk/setup.o en/xsk/rx.o en/xsk/tx.o en/devlink.o en/ptp.o \

		en/qos.o en/trap.o en/fs_tt_redirect.o

		en/qos.o en/trap.o en/fs_tt_redirect.o en/rqt.o en/tir.o \

		en/rx_res.o



#

# Netdev extra

drivers/net/ethernet/mellanox/mlx5/core/en.h

+7 −57
Original line number Diff line number Diff line
@@ -58,6 +58,7 @@ 
#include "en/qos.h"

#include "lib/hv_vhca.h"

#include "lib/clock.h"

#include "en/rx_res.h"



extern const struct net_device_ops mlx5e_netdev_ops;

struct page_pool;
@@ -126,7 +127,6 @@ struct page_pool; 


#define MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE_MPW            0x2



#define MLX5E_PARAMS_DEFAULT_LRO_WQE_SZ                 (64 * 1024)

#define MLX5E_DEFAULT_LRO_TIMEOUT                       32

#define MLX5E_LRO_TIMEOUT_ARR_SIZE                      4
@@ -139,10 +139,7 @@ struct page_pool; 
#define MLX5E_PARAMS_DEFAULT_MIN_RX_WQES                0x80

#define MLX5E_PARAMS_DEFAULT_MIN_RX_WQES_MPW            0x2



#define MLX5E_LOG_INDIR_RQT_SIZE       0x8

#define MLX5E_INDIR_RQT_SIZE           BIT(MLX5E_LOG_INDIR_RQT_SIZE)

#define MLX5E_MIN_NUM_CHANNELS         0x1

#define MLX5E_MAX_NUM_CHANNELS         (MLX5E_INDIR_RQT_SIZE / 2)

#define MLX5E_MAX_NUM_SQS              (MLX5E_MAX_NUM_CHANNELS * MLX5E_MAX_NUM_TC)

#define MLX5E_TX_CQ_POLL_BUDGET        128

#define MLX5E_TX_XSK_POLL_BUDGET       64
@@ -745,29 +742,11 @@ enum { 
	MLX5E_STATE_XDP_ACTIVE,

};



struct mlx5e_rqt {

	u32              rqtn;

	bool		 enabled;

};



struct mlx5e_tir {

	u32		  tirn;

	struct mlx5e_rqt  rqt;

	struct list_head  list;

};



enum {

	MLX5E_TC_PRIO = 0,

	MLX5E_NIC_PRIO

};



struct mlx5e_rss_params {

	u32	indirection_rqt[MLX5E_INDIR_RQT_SIZE];

	u32	rx_hash_fields[MLX5E_NUM_INDIR_TIRS];

	u8	toeplitz_hash_key[40];

	u8	hfunc;

};



struct mlx5e_modify_sq_param {

	int curr_state;

	int next_state;
@@ -837,13 +816,7 @@ struct mlx5e_priv { 


	struct mlx5e_channels      channels;

	u32                        tisn[MLX5_MAX_PORTS][MLX5E_MAX_NUM_TC];

	struct mlx5e_rqt           indir_rqt;

	struct mlx5e_tir           indir_tir[MLX5E_NUM_INDIR_TIRS];

	struct mlx5e_tir           inner_indir_tir[MLX5E_NUM_INDIR_TIRS];

	struct mlx5e_tir           direct_tir[MLX5E_MAX_NUM_CHANNELS];

	struct mlx5e_tir           xsk_tir[MLX5E_MAX_NUM_CHANNELS];

	struct mlx5e_tir           ptp_tir;

	struct mlx5e_rss_params    rss_params;

	struct mlx5e_rx_res       *rx_res;

	u32                        tx_rates[MLX5E_MAX_NUM_SQS];



	struct mlx5e_flow_steering fs;
@@ -948,24 +921,7 @@ int mlx5e_vlan_rx_kill_vid(struct net_device *dev, __always_unused __be16 proto, 
			   u16 vid);

void mlx5e_timestamp_init(struct mlx5e_priv *priv);



struct mlx5e_redirect_rqt_param {

	bool is_rss;

	union {

		u32 rqn; /* Direct RQN (Non-RSS) */

		struct {

			u8 hfunc;

			struct mlx5e_channels *channels;

		} rss; /* RSS data */

	};

};



int mlx5e_redirect_rqt(struct mlx5e_priv *priv, u32 rqtn, int sz,

		       struct mlx5e_redirect_rqt_param rrp);

void mlx5e_build_indir_tir_ctx_hash(struct mlx5e_rss_params *rss_params,

				    const struct mlx5e_tirc_config *ttconfig,

				    void *tirc, bool inner);

void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in);

struct mlx5e_tirc_config mlx5e_tirc_get_default_config(enum mlx5e_traffic_types tt);

int mlx5e_modify_tirs_hash(struct mlx5e_priv *priv);



struct mlx5e_xsk_param;
@@ -1065,10 +1021,6 @@ static inline bool mlx5_tx_swp_supported(struct mlx5_core_dev *mdev) 


extern const struct ethtool_ops mlx5e_ethtool_ops;



int mlx5e_create_tir(struct mlx5_core_dev *mdev, struct mlx5e_tir *tir,

		     u32 *in);

void mlx5e_destroy_tir(struct mlx5_core_dev *mdev,

		       struct mlx5e_tir *tir);

int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev);

void mlx5e_destroy_mdev_resources(struct mlx5_core_dev *mdev);

int mlx5e_refresh_tirs(struct mlx5e_priv *priv, bool enable_uc_lb,
@@ -1089,11 +1041,10 @@ int mlx5e_create_indirect_rqt(struct mlx5e_priv *priv); 
int mlx5e_create_indirect_tirs(struct mlx5e_priv *priv, bool inner_ttc);

void mlx5e_destroy_indirect_tirs(struct mlx5e_priv *priv);



int mlx5e_create_direct_rqts(struct mlx5e_priv *priv, struct mlx5e_tir *tirs, int n);

void mlx5e_destroy_direct_rqts(struct mlx5e_priv *priv, struct mlx5e_tir *tirs, int n);

int mlx5e_create_direct_tirs(struct mlx5e_priv *priv, struct mlx5e_tir *tirs, int n);

void mlx5e_destroy_direct_tirs(struct mlx5e_priv *priv, struct mlx5e_tir *tirs, int n);

void mlx5e_destroy_rqt(struct mlx5e_priv *priv, struct mlx5e_rqt *rqt);

int mlx5e_create_direct_rqts(struct mlx5e_priv *priv);

void mlx5e_destroy_direct_rqts(struct mlx5e_priv *priv);

int mlx5e_create_direct_tirs(struct mlx5e_priv *priv);

void mlx5e_destroy_direct_tirs(struct mlx5e_priv *priv);



int mlx5e_create_tis(struct mlx5_core_dev *mdev, void *in, u32 *tisn);

void mlx5e_destroy_tis(struct mlx5_core_dev *mdev, u32 tisn);
@@ -1106,7 +1057,6 @@ int mlx5e_close(struct net_device *netdev); 
int mlx5e_open(struct net_device *netdev);



void mlx5e_queue_update_stats(struct mlx5e_priv *priv);

int mlx5e_bits_invert(unsigned long a, int size);



int mlx5e_set_dev_port_mtu(struct mlx5e_priv *priv);

int mlx5e_set_dev_port_mtu_ctx(struct mlx5e_priv *priv, void *context);

drivers/net/ethernet/mellanox/mlx5/core/en/fs.h

+2 −12
Original line number Diff line number Diff line
@@ -83,12 +83,6 @@ enum mlx5e_traffic_types { 
	MLX5E_NUM_INDIR_TIRS = MLX5E_TT_ANY,

};



struct mlx5e_tirc_config {

	u8 l3_prot_type;

	u8 l4_prot_type;

	u32 rx_hash_fields;

};



#define MLX5_HASH_IP		(MLX5_HASH_FIELD_SEL_SRC_IP   |\

				 MLX5_HASH_FIELD_SEL_DST_IP)

#define MLX5_HASH_IP_L4PORTS	(MLX5_HASH_FIELD_SEL_SRC_IP   |\
@@ -160,6 +154,8 @@ enum { 
					 MLX5E_INNER_TTC_GROUP2_SIZE +\

					 MLX5E_INNER_TTC_GROUP3_SIZE)



struct mlx5e_priv;



#ifdef CONFIG_MLX5_EN_RXNFC



struct mlx5e_ethtool_table {
@@ -248,18 +244,12 @@ struct ttc_params { 


void mlx5e_set_ttc_basic_params(struct mlx5e_priv *priv, struct ttc_params *ttc_params);

void mlx5e_set_ttc_ft_params(struct ttc_params *ttc_params);

void mlx5e_set_inner_ttc_ft_params(struct ttc_params *ttc_params);



int mlx5e_create_ttc_table(struct mlx5e_priv *priv, struct ttc_params *params,

			   struct mlx5e_ttc_table *ttc);

void mlx5e_destroy_ttc_table(struct mlx5e_priv *priv,

			     struct mlx5e_ttc_table *ttc);



int mlx5e_create_inner_ttc_table(struct mlx5e_priv *priv, struct ttc_params *params,

				 struct mlx5e_ttc_table *ttc);

void mlx5e_destroy_inner_ttc_table(struct mlx5e_priv *priv,

				   struct mlx5e_ttc_table *ttc);



void mlx5e_destroy_flow_table(struct mlx5e_flow_table *ft);

int mlx5e_ttc_fwd_dest(struct mlx5e_priv *priv, enum mlx5e_traffic_types type,

		       struct mlx5_flow_destination *new_dest);

drivers/net/ethernet/mellanox/mlx5/core/en/params.c

+12 −0
Original line number Diff line number Diff line
@@ -167,6 +167,18 @@ u16 mlx5e_get_rq_headroom(struct mlx5_core_dev *mdev, 
	return is_linear_skb ? mlx5e_get_linear_rq_headroom(params, xsk) : 0;

}



struct mlx5e_lro_param mlx5e_get_lro_param(struct mlx5e_params *params)

{

	struct mlx5e_lro_param lro_param;



	lro_param = (struct mlx5e_lro_param) {

		.enabled = params->lro_en,

		.timeout = params->lro_timeout,

	};



	return lro_param;

}



u16 mlx5e_calc_sq_stop_room(struct mlx5_core_dev *mdev, struct mlx5e_params *params)

{

	bool is_mpwqe = MLX5E_GET_PFLAG(params, MLX5E_PFLAG_SKB_TX_MPWQE);

drivers/net/ethernet/mellanox/mlx5/core/en/params.h

+6 −0
Original line number Diff line number Diff line
@@ -11,6 +11,11 @@ struct mlx5e_xsk_param { 
	u16 chunk_size;

};



struct mlx5e_lro_param {

	bool enabled;

	u32 timeout;

};



struct mlx5e_cq_param {

	u32                        cqc[MLX5_ST_SZ_DW(cqc)];

	struct mlx5_wq_param       wq;
@@ -120,6 +125,7 @@ u8 mlx5e_mpwqe_get_log_num_strides(struct mlx5_core_dev *mdev, 
u16 mlx5e_get_rq_headroom(struct mlx5_core_dev *mdev,

			  struct mlx5e_params *params,

			  struct mlx5e_xsk_param *xsk);

struct mlx5e_lro_param mlx5e_get_lro_param(struct mlx5e_params *params);



/* Build queue parameters */