Loading arch/arm/mach-ixp4xx/include/mach/hardware.h +0 −1 Original line number Diff line number Diff line Loading @@ -44,7 +44,6 @@ #include "platform.h" /* Platform specific details */ #include "ixdp425.h" #include "avila.h" #include "coyote.h" #include "prpmc1100.h" Loading arch/arm/mach-ixp4xx/include/mach/irqs.h +0 −8 Original line number Diff line number Diff line Loading @@ -70,14 +70,6 @@ #define XSCALE_PMU_IRQ (IRQ_IXP4XX_XSCALE_PMU) /* * IXDP425 board IRQs */ #define IRQ_IXDP425_PCI_INTA IRQ_IXP4XX_GPIO11 #define IRQ_IXDP425_PCI_INTB IRQ_IXP4XX_GPIO10 #define IRQ_IXDP425_PCI_INTC IRQ_IXP4XX_GPIO9 #define IRQ_IXDP425_PCI_INTD IRQ_IXP4XX_GPIO8 /* * Gateworks Avila board IRQs */ Loading arch/arm/mach-ixp4xx/include/mach/ixdp425.hdeleted 100644 → 0 +0 −39 Original line number Diff line number Diff line /* * arch/arm/mach-ixp4xx/include/mach/ixdp425.h * * IXDP425 platform specific definitions * * Author: Deepak Saxena <dsaxena@plexity.net> * * Copyright 2004 (c) MontaVista, Software, Inc. * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #ifndef __ASM_ARCH_HARDWARE_H__ #error "Do not include this directly, instead #include <mach/hardware.h>" #endif #define IXDP425_SDA_PIN 7 #define IXDP425_SCL_PIN 6 /* * IXDP425 PCI IRQs */ #define IXDP425_PCI_MAX_DEV 4 #define IXDP425_PCI_IRQ_LINES 4 /* PCI controller GPIO to IRQ pin mappings */ #define IXDP425_PCI_INTA_PIN 11 #define IXDP425_PCI_INTB_PIN 10 #define IXDP425_PCI_INTC_PIN 9 #define IXDP425_PCI_INTD_PIN 8 /* NAND Flash pins */ #define IXDP425_NAND_NCE_PIN 12 #define IXDP425_NAND_CMD_BYTE 0x01 #define IXDP425_NAND_ADDR_BYTE 0x02 arch/arm/mach-ixp4xx/ixdp425-pci.c +15 −2 Original line number Diff line number Diff line Loading @@ -19,12 +19,25 @@ #include <linux/init.h> #include <linux/irq.h> #include <linux/delay.h> #include <asm/mach/pci.h> #include <asm/irq.h> #include <mach/hardware.h> #include <asm/mach-types.h> #define IXDP425_PCI_MAX_DEV 4 #define IXDP425_PCI_IRQ_LINES 4 /* PCI controller GPIO to IRQ pin mappings */ #define IXDP425_PCI_INTA_PIN 11 #define IXDP425_PCI_INTB_PIN 10 #define IXDP425_PCI_INTC_PIN 9 #define IXDP425_PCI_INTD_PIN 8 #define IRQ_IXDP425_PCI_INTA IRQ_IXP4XX_GPIO11 #define IRQ_IXDP425_PCI_INTB IRQ_IXP4XX_GPIO10 #define IRQ_IXDP425_PCI_INTC IRQ_IXP4XX_GPIO9 #define IRQ_IXDP425_PCI_INTD IRQ_IXP4XX_GPIO8 void __init ixdp425_pci_preinit(void) { set_irq_type(IRQ_IXDP425_PCI_INTA, IRQ_TYPE_LEVEL_LOW); Loading arch/arm/mach-ixp4xx/ixdp425-setup.c +10 −2 Original line number Diff line number Diff line Loading @@ -21,7 +21,6 @@ #include <linux/mtd/nand.h> #include <linux/mtd/partitions.h> #include <linux/delay.h> #include <asm/types.h> #include <asm/setup.h> #include <asm/memory.h> Loading @@ -31,6 +30,15 @@ #include <asm/mach/arch.h> #include <asm/mach/flash.h> #define IXDP425_SDA_PIN 7 #define IXDP425_SCL_PIN 6 /* NAND Flash pins */ #define IXDP425_NAND_NCE_PIN 12 #define IXDP425_NAND_CMD_BYTE 0x01 #define IXDP425_NAND_ADDR_BYTE 0x02 static struct flash_platform_data ixdp425_flash_data = { .map_name = "cfi_probe", .width = 2, Loading Loading
arch/arm/mach-ixp4xx/include/mach/hardware.h +0 −1 Original line number Diff line number Diff line Loading @@ -44,7 +44,6 @@ #include "platform.h" /* Platform specific details */ #include "ixdp425.h" #include "avila.h" #include "coyote.h" #include "prpmc1100.h" Loading
arch/arm/mach-ixp4xx/include/mach/irqs.h +0 −8 Original line number Diff line number Diff line Loading @@ -70,14 +70,6 @@ #define XSCALE_PMU_IRQ (IRQ_IXP4XX_XSCALE_PMU) /* * IXDP425 board IRQs */ #define IRQ_IXDP425_PCI_INTA IRQ_IXP4XX_GPIO11 #define IRQ_IXDP425_PCI_INTB IRQ_IXP4XX_GPIO10 #define IRQ_IXDP425_PCI_INTC IRQ_IXP4XX_GPIO9 #define IRQ_IXDP425_PCI_INTD IRQ_IXP4XX_GPIO8 /* * Gateworks Avila board IRQs */ Loading
arch/arm/mach-ixp4xx/include/mach/ixdp425.hdeleted 100644 → 0 +0 −39 Original line number Diff line number Diff line /* * arch/arm/mach-ixp4xx/include/mach/ixdp425.h * * IXDP425 platform specific definitions * * Author: Deepak Saxena <dsaxena@plexity.net> * * Copyright 2004 (c) MontaVista, Software, Inc. * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #ifndef __ASM_ARCH_HARDWARE_H__ #error "Do not include this directly, instead #include <mach/hardware.h>" #endif #define IXDP425_SDA_PIN 7 #define IXDP425_SCL_PIN 6 /* * IXDP425 PCI IRQs */ #define IXDP425_PCI_MAX_DEV 4 #define IXDP425_PCI_IRQ_LINES 4 /* PCI controller GPIO to IRQ pin mappings */ #define IXDP425_PCI_INTA_PIN 11 #define IXDP425_PCI_INTB_PIN 10 #define IXDP425_PCI_INTC_PIN 9 #define IXDP425_PCI_INTD_PIN 8 /* NAND Flash pins */ #define IXDP425_NAND_NCE_PIN 12 #define IXDP425_NAND_CMD_BYTE 0x01 #define IXDP425_NAND_ADDR_BYTE 0x02
arch/arm/mach-ixp4xx/ixdp425-pci.c +15 −2 Original line number Diff line number Diff line Loading @@ -19,12 +19,25 @@ #include <linux/init.h> #include <linux/irq.h> #include <linux/delay.h> #include <asm/mach/pci.h> #include <asm/irq.h> #include <mach/hardware.h> #include <asm/mach-types.h> #define IXDP425_PCI_MAX_DEV 4 #define IXDP425_PCI_IRQ_LINES 4 /* PCI controller GPIO to IRQ pin mappings */ #define IXDP425_PCI_INTA_PIN 11 #define IXDP425_PCI_INTB_PIN 10 #define IXDP425_PCI_INTC_PIN 9 #define IXDP425_PCI_INTD_PIN 8 #define IRQ_IXDP425_PCI_INTA IRQ_IXP4XX_GPIO11 #define IRQ_IXDP425_PCI_INTB IRQ_IXP4XX_GPIO10 #define IRQ_IXDP425_PCI_INTC IRQ_IXP4XX_GPIO9 #define IRQ_IXDP425_PCI_INTD IRQ_IXP4XX_GPIO8 void __init ixdp425_pci_preinit(void) { set_irq_type(IRQ_IXDP425_PCI_INTA, IRQ_TYPE_LEVEL_LOW); Loading
arch/arm/mach-ixp4xx/ixdp425-setup.c +10 −2 Original line number Diff line number Diff line Loading @@ -21,7 +21,6 @@ #include <linux/mtd/nand.h> #include <linux/mtd/partitions.h> #include <linux/delay.h> #include <asm/types.h> #include <asm/setup.h> #include <asm/memory.h> Loading @@ -31,6 +30,15 @@ #include <asm/mach/arch.h> #include <asm/mach/flash.h> #define IXDP425_SDA_PIN 7 #define IXDP425_SCL_PIN 6 /* NAND Flash pins */ #define IXDP425_NAND_NCE_PIN 12 #define IXDP425_NAND_CMD_BYTE 0x01 #define IXDP425_NAND_ADDR_BYTE 0x02 static struct flash_platform_data ixdp425_flash_data = { .map_name = "cfi_probe", .width = 2, Loading