Commit 9be26ddf authored by Emily.Deng's avatar Emily.Deng Committed by Alex Deucher
Browse files

drm/amdgpu: Restore msix after FLR 



After FLR, the msix will be cleared, so need to re-enable it.

Signed-off-by: default avatarPeng Ju Zhou <PengJu.Zhou@amd.com>
Signed-off-by: default avatarEmily.Deng <Emily.Deng@amd.com>
Reviewed-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 99e7d65c

drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c

+18 −0
Original line number Diff line number Diff line
@@ -278,6 +278,21 @@ static bool amdgpu_msi_ok(struct amdgpu_device *adev) 
	return true;

}



static void amdgpu_restore_msix(struct amdgpu_device *adev)

{

	u16 ctrl;



	pci_read_config_word(adev->pdev, adev->pdev->msix_cap + PCI_MSIX_FLAGS, &ctrl);

	if (!(ctrl & PCI_MSIX_FLAGS_ENABLE))

		return;



	/* VF FLR */

	ctrl &= ~PCI_MSIX_FLAGS_ENABLE;

	pci_write_config_word(adev->pdev, adev->pdev->msix_cap + PCI_MSIX_FLAGS, ctrl);

	ctrl |= PCI_MSIX_FLAGS_ENABLE;

	pci_write_config_word(adev->pdev, adev->pdev->msix_cap + PCI_MSIX_FLAGS, ctrl);

}



/**

 * amdgpu_irq_init - initialize interrupt handling

 *
@@ -569,6 +584,9 @@ void amdgpu_irq_gpu_reset_resume_helper(struct amdgpu_device *adev) 
{

	int i, j, k;



	if (amdgpu_sriov_vf(adev))

		amdgpu_restore_msix(adev);



	for (i = 0; i < AMDGPU_IRQ_CLIENTID_MAX; ++i) {

		if (!adev->irq.client[i].sources)

			continue;