Commit 9bdf765c authored by Jason Zeng's avatar Jason Zeng
Browse files

kabi: reserve x86 cpu capability fields 

Intel inclusion
category: feature
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I908FY


CVE: NA

--------------------------------

New CPUID leaf or CVE fix for CPU bugs may need more entries in cpu
feature bits and bug bits. So reserve it.

Signed-off-by: default avatarJason Zeng <jason.zeng@intel.com>
parent d4a92cc8

arch/x86/include/asm/cpufeature.h

+31 −2
Original line number Diff line number Diff line
@@ -10,6 +10,8 @@ 
#include <linux/bitops.h>

#include <asm/alternative.h>



#include <linux/kabi.h>



enum cpuid_leafs

{

	CPUID_1_EDX		= 0,
@@ -33,6 +35,15 @@ enum cpuid_leafs 
	CPUID_7_EDX,

	CPUID_8000_001F_EAX,

	CPUID_8000_0021_EAX,

	CPUID_RESERVED_1,

	CPUID_RESERVED_2,

	CPUID_RESERVED_3,

	CPUID_RESERVED_4,

	CPUID_RESERVED_5,

	CPUID_RESERVED_6,

	CPUID_RESERVED_7,

	CPUID_RESERVED_8,

	CPUID_RESERVED_9,

};



#define X86_CAP_FMT_NUM "%d:%d"
@@ -91,8 +102,17 @@ extern const char * const x86_bug_flags[NBUGINTS*32]; 
	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 18, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 19, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 20, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 21, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 22, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 23, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 24, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 25, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 26, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 27, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 28, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 29, feature_bit) ||	\

	   REQUIRED_MASK_CHECK					  ||	\

	   BUILD_BUG_ON_ZERO(NCAPINTS != 21))

	   BUILD_BUG_ON_ZERO(NCAPINTS != 30))



#define DISABLED_MASK_BIT_SET(feature_bit)				\

	 ( CHECK_BIT_IN_MASK_WORD(DISABLED_MASK,  0, feature_bit) ||	\
@@ -116,8 +136,17 @@ extern const char * const x86_bug_flags[NBUGINTS*32]; 
	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 18, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 19, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 20, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 21, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 22, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 23, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 24, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 25, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 26, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 27, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 28, feature_bit) ||	\

	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 29, feature_bit) ||	\

	   DISABLED_MASK_CHECK					  ||	\

	   BUILD_BUG_ON_ZERO(NCAPINTS != 21))

	   BUILD_BUG_ON_ZERO(NCAPINTS != 30))



#define cpu_has(c, bit)							\

	(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 :	\

arch/x86/include/asm/cpufeatures.h

+1 −1
Original line number Diff line number Diff line
@@ -13,7 +13,7 @@ 
/*

 * Defines x86 CPU feature bits

 */

#define NCAPINTS			21	   /* N 32-bit words worth of info */

#define NCAPINTS			30	   /* N 32-bit words worth of info */

#define NBUGINTS			2	   /* N 32-bit bug flags */



/*

arch/x86/include/asm/disabled-features.h

+10 −1
Original line number Diff line number Diff line
@@ -143,6 +143,15 @@ 
#define DISABLED_MASK18	(DISABLE_IBT)

#define DISABLED_MASK19	0

#define DISABLED_MASK20	0

#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 21)

#define DISABLED_MASK21	0

#define DISABLED_MASK22	0

#define DISABLED_MASK23	0

#define DISABLED_MASK24	0

#define DISABLED_MASK25	0

#define DISABLED_MASK26	0

#define DISABLED_MASK27	0

#define DISABLED_MASK28	0

#define DISABLED_MASK29	0

#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 30)



#endif /* _ASM_X86_DISABLED_FEATURES_H */

arch/x86/include/asm/required-features.h

+10 −1
Original line number Diff line number Diff line
@@ -99,6 +99,15 @@ 
#define REQUIRED_MASK18	0

#define REQUIRED_MASK19	0

#define REQUIRED_MASK20	0

#define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 21)

#define REQUIRED_MASK21	0

#define REQUIRED_MASK22	0

#define REQUIRED_MASK23	0

#define REQUIRED_MASK24	0

#define REQUIRED_MASK25	0

#define REQUIRED_MASK26	0

#define REQUIRED_MASK27	0

#define REQUIRED_MASK28	0

#define REQUIRED_MASK29	0

#define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 30)



#endif /* _ASM_X86_REQUIRED_FEATURES_H */

tools/arch/x86/include/asm/cpufeatures.h

+1 −1
Original line number Diff line number Diff line
@@ -13,7 +13,7 @@ 
/*

 * Defines x86 CPU feature bits

 */

#define NCAPINTS			21	   /* N 32-bit words worth of info */

#define NCAPINTS			30	   /* N 32-bit words worth of info */

#define NBUGINTS			2	   /* N 32-bit bug flags */



/*