Commit 9b2e3723 authored by Patrisious Haddad's avatar Patrisious Haddad Committed by Leon Romanovsky
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net/mlx5: Introduce CQE error syndrome 



Introduces CQE error syndrome bits which are inside qp_context_extension
and are used to report the reason the QP was moved to error state.
Useful for cases in which a CQE isn't generated, such as remote write
rkey violation.

Signed-off-by: default avatarPatrisious Haddad <phaddad@nvidia.com>
Link: https://lore.kernel.org/r/f8359315f8130f6d2abe4b94409ac7802f54bce3.1672821186.git.leonro@nvidia.com


Reviewed-by: default avatarSaeed Mahameed <saeed@kernel.org>
Signed-off-by: default avatarLeon Romanovsky <leon@kernel.org>
parent b7bfaa76

include/linux/mlx5/mlx5_ifc.h

+42 −5
Original line number Diff line number Diff line
@@ -1496,7 +1496,9 @@ struct mlx5_ifc_cmd_hca_cap_bits { 
	u8         null_mkey[0x1];

	u8         log_max_klm_list_size[0x6];



	u8         reserved_at_120[0xa];

	u8         reserved_at_120[0x2];

	u8	   qpc_extension[0x1];

	u8	   reserved_at_123[0x7];

	u8         log_max_ra_req_dc[0x6];

	u8         reserved_at_130[0x2];

	u8         eth_wqe_too_small[0x1];
@@ -1662,7 +1664,9 @@ struct mlx5_ifc_cmd_hca_cap_bits { 


	u8         log_bf_reg_size[0x5];



	u8         reserved_at_270[0x6];

	u8         reserved_at_270[0x3];

	u8	   qp_error_syndrome[0x1];

	u8	   reserved_at_274[0x2];

	u8         lag_dct[0x2];

	u8         lag_tx_port_affinity[0x1];

	u8         lag_native_fdb_selection[0x1];
@@ -5342,6 +5346,37 @@ struct mlx5_ifc_query_rmp_in_bits { 
	u8         reserved_at_60[0x20];

};



struct mlx5_ifc_cqe_error_syndrome_bits {

	u8         hw_error_syndrome[0x8];

	u8         hw_syndrome_type[0x4];

	u8         reserved_at_c[0x4];

	u8         vendor_error_syndrome[0x8];

	u8         syndrome[0x8];

};



struct mlx5_ifc_qp_context_extension_bits {

	u8         reserved_at_0[0x60];



	struct mlx5_ifc_cqe_error_syndrome_bits error_syndrome;



	u8         reserved_at_80[0x580];

};



struct mlx5_ifc_qpc_extension_and_pas_list_in_bits {

	struct mlx5_ifc_qp_context_extension_bits qpc_data_extension;



	u8         pas[0][0x40];

};



struct mlx5_ifc_qp_pas_list_in_bits {

	struct mlx5_ifc_cmd_pas_bits pas[0];

};



union mlx5_ifc_qp_pas_or_qpc_ext_and_pas_bits {

	struct mlx5_ifc_qp_pas_list_in_bits qp_pas_list;

	struct mlx5_ifc_qpc_extension_and_pas_list_in_bits qpc_ext_and_pas_list;

};



struct mlx5_ifc_query_qp_out_bits {

	u8         status[0x8];

	u8         reserved_at_8[0x18];
@@ -5358,7 +5393,7 @@ struct mlx5_ifc_query_qp_out_bits { 


	u8         reserved_at_800[0x80];



	u8         pas[][0x40];

	union mlx5_ifc_qp_pas_or_qpc_ext_and_pas_bits qp_pas_or_qpc_ext_and_pas;

};



struct mlx5_ifc_query_qp_in_bits {
@@ -5368,7 +5403,8 @@ struct mlx5_ifc_query_qp_in_bits { 
	u8         reserved_at_20[0x10];

	u8         op_mod[0x10];



	u8         reserved_at_40[0x8];

	u8         qpc_ext[0x1];

	u8         reserved_at_41[0x7];

	u8         qpn[0x18];



	u8         reserved_at_60[0x20];
@@ -8571,7 +8607,8 @@ struct mlx5_ifc_create_qp_in_bits { 
	u8         reserved_at_20[0x10];

	u8         op_mod[0x10];



	u8         reserved_at_40[0x8];

	u8         qpc_ext[0x1];

	u8         reserved_at_41[0x7];

	u8         input_qpn[0x18];



	u8         reserved_at_60[0x20];