Commit 9a8ab2bf authored by Bolarinwa Olayemi Saheed's avatar Bolarinwa Olayemi Saheed Committed by Kalle Valo
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ath9k: Check the return value of pcie_capability_read_*()



On failure pcie_capability_read_dword() sets it's last parameter, val
to 0. However, with Patch 14/14, it is possible that val is set to ~0 on
failure. This would introduce a bug because (x & x) == (~0 & x).

This bug can be avoided without changing the function's behaviour if the
return value of pcie_capability_read_dword is checked to confirm success.

Check the return value of pcie_capability_read_dword() to ensure success.

Suggested-by: default avatarBjorn Helgaas <bjorn@helgaas.com>
Signed-off-by: default avatarBolarinwa Olayemi Saheed <refactormyself@gmail.com>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20200713175529.29715-2-refactormyself@gmail.com
parent a9bf0909
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+3 −2
Original line number Diff line number Diff line
@@ -825,6 +825,7 @@ static void ath_pci_aspm_init(struct ath_common *common)
	struct pci_dev *pdev = to_pci_dev(sc->dev);
	struct pci_dev *parent;
	u16 aspm;
	int ret;

	if (!ah->is_pciexpress)
		return;
@@ -866,8 +867,8 @@ static void ath_pci_aspm_init(struct ath_common *common)
	if (AR_SREV_9462(ah))
		pci_read_config_dword(pdev, 0x70c, &ah->config.aspm_l1_fix);

	pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm);
	if (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1)) {
	ret = pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm);
	if (!ret && (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1))) {
		ah->aspm_enabled = true;
		/* Initialize PCIe PM and SERDES registers. */
		ath9k_hw_configpcipowersave(ah, false);