Commit 9a61ddc4 authored by Dai Xin's avatar Dai Xin Committed by guzitao
Browse files

sw64: refactor platform dependent codes

Sunway inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I5XTK7



--------------------------------

This commit includes changes as follows:

- Refactor machine power interface functions similarly to other
  architectures.
- Keep legacy suspend implementation which may be deprecated some day.

Signed-off-by: default avatarDai Xin <daixin@wxiat.com>
Reviewed-by: default avatarHe Sheng <hesheng@wxiat.com>
Signed-off-by: default avatarGu Zitao <guzitao@wxiat.com>
parent 56d1a0a4
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+7 −0
Original line number Diff line number Diff line
@@ -254,6 +254,13 @@ config PLATFORM_XUELANG

endchoice

config LEGACY_XUELANG
        bool "Xuelang Reset Interface"
        depends on SW64_CHIP3
        help
          This enables the legacy reset driver for SW64 chip3 CRBs. This interface
          as a temporary solution will be deprecated in the future.

config MIGHT_HAVE_PC_SERIO
	bool "Use PC serio device i8042"
	select ARCH_MIGHT_HAVE_PC_SERIO
+11 −1
Original line number Diff line number Diff line
@@ -2,8 +2,10 @@
#ifndef _ASM_SW64_PLATFORM_H
#define _ASM_SW64_PLATFORM_H

#include <linux/types.h>
#include <asm/chip3_io.h>

struct sw64_platform_ops {
	void (*kill_arch)(int mode);
	void __iomem *(*ioportmap)(unsigned long);
	void (*register_platform_devices)(void);
	void (*ops_fixup)(void);
@@ -14,4 +16,12 @@ extern struct sw64_platform_ops *sw64_platform;

extern struct sw64_platform_ops xuelang_ops;

extern void sw64_halt(void);
extern void sw64_poweroff(void);
extern void sw64_restart(void);
extern void (*pm_restart)(void);
extern void (*pm_halt)(void);
extern int i2c_set_adapter(void);
extern void cpld_write(uint8_t slave_addr, uint8_t reg, uint8_t data);

#endif /* _ASM_SW64_PLATFORM_H */
+1 −4
Original line number Diff line number Diff line
@@ -366,10 +366,7 @@ void handle_ipi(struct pt_regs *regs)

			case IPI_CPU_STOP:
				local_irq_disable();
				pr_crit("other core panic, now halt...\n");
				while (1)
					asm("nop");
				halt();
				asm("halt");

			default:
				pr_crit("Unknown IPI on CPU %d: %lu\n", this_cpu, which);
+0 −60
Original line number Diff line number Diff line
// SPDX-License-Identifier: GPL-2.0
#include <asm/platform.h>
#include <asm/sw64_init.h>
#include <linux/reboot.h>

static void vt_mode_kill_arch(int mode)
{
	hcall(HCALL_SET_CLOCKEVENT, 0, 0, 0);

	switch (mode) {
	case LINUX_REBOOT_CMD_RESTART:
		hcall(HCALL_RESTART, 0, 0, 0);
		mb();
		break;
	case LINUX_REBOOT_CMD_HALT:
	case LINUX_REBOOT_CMD_POWER_OFF:
		hcall(HCALL_SHUTDOWN, 0, 0, 0);
		mb();
		break;
	default:
		break;
	}
}

extern void cpld_write(uint8_t slave_addr, uint8_t reg, uint8_t data);

static void xuelang_kill_arch(int mode)
{
	struct pci_dev *pdev;
	struct pci_controller *hose;
	int val;

	if (is_in_host()) {
		switch (mode) {
		case LINUX_REBOOT_CMD_RESTART:
			pdev = pci_get_device(PCI_VENDOR_ID_JMICRON,
					      0x0585, NULL);
			if (pdev) {
				hose = (struct pci_controller *)pdev->sysdata;
				val = read_rc_conf(hose->node, hose->index,
						   RC_PORT_LINK_CTL);
				write_rc_conf(hose->node, hose->index,
					      RC_PORT_LINK_CTL, val | 0x8);
				write_rc_conf(hose->node, hose->index,
					      RC_PORT_LINK_CTL, val);
			}

			cpld_write(0x64, 0x00, 0xc3);
			mb();
			break;
		case LINUX_REBOOT_CMD_HALT:
		case LINUX_REBOOT_CMD_POWER_OFF:
			cpld_write(0x64, 0x00, 0xf0);
			mb();
			break;
		default:
			break;
		}
	} else {
		vt_mode_kill_arch(mode);
	}
}

static inline void __iomem *xuelang_ioportmap(unsigned long addr)
{
@@ -74,7 +15,6 @@ static inline void __iomem *xuelang_ioportmap(unsigned long addr)
}

struct sw64_platform_ops xuelang_ops = {
	.kill_arch	= xuelang_kill_arch,
	.ioportmap	= xuelang_ioportmap,
	.ops_fixup	= sw64_init_noop,
};
+1 −0
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@
#

obj-$(CONFIG_X86)		+= x86/
obj-$(CONFIG_SW64)		+= sw64/
obj-$(CONFIG_MELLANOX_PLATFORM)	+= mellanox/
obj-$(CONFIG_MIPS)		+= mips/
obj-$(CONFIG_OLPC_EC)		+= olpc/
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