Commit 9a531e4d authored by Steen Hegelund's avatar Steen Hegelund Committed by Philipp Zabel
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dt-bindings: reset: microchip sparx5 reset driver bindings 



Document the Sparx5 reset device driver bindings

The driver uses a syscon and an IO range on sparx5 for access to
the reset control and the reset status.

Sparx5 will no longer use the existing Ocelot chip reset driver, but use
this new switch reset driver as it has the reset controller interface that
allows the first client to perform the reset on behalf of all the Sparx5
component drivers.

Signed-off-by: default avatarSteen Hegelund <steen.hegelund@microchip.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
parent 91b8050c

Documentation/devicetree/bindings/reset/microchip,rst.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: "http://devicetree.org/schemas/reset/microchip,rst.yaml#"

$schema: "http://devicetree.org/meta-schemas/core.yaml#"



title: Microchip Sparx5 Switch Reset Controller



maintainers:

  - Steen Hegelund <steen.hegelund@microchip.com>

  - Lars Povlsen <lars.povlsen@microchip.com>



description: |

  The Microchip Sparx5 Switch provides reset control and implements the following

  functions

    - One Time Switch Core Reset (Soft Reset)



properties:

  $nodename:

    pattern: "^reset-controller@[0-9a-f]+$"



  compatible:

    const: microchip,sparx5-switch-reset



  reg:

    items:

      - description: global control block registers



  reg-names:

    items:

      - const: gcb



  "#reset-cells":

    const: 1



  cpu-syscon:

    $ref: "/schemas/types.yaml#/definitions/phandle"

    description: syscon used to access CPU reset



required:

  - compatible

  - reg

  - reg-names

  - "#reset-cells"

  - cpu-syscon



additionalProperties: false



examples:

  - |

    reset: reset-controller@11010008 {

        compatible = "microchip,sparx5-switch-reset";

        reg = <0x11010008 0x4>;

        reg-names = "gcb";

        #reset-cells = <1>;

        cpu-syscon = <&cpu_ctrl>;

    };